74LVC14ABQ: 十六进制反相施密特触发器,带5 V容压输入

74LVC14A提供六个带施密特触发器输入的反相缓冲器。该器件能够将缓慢变化的输入信号转换成清晰无抖动的输出信号。

输入针对正向和负向信号在不同点进行切换。正电压VT+和负电压VT-之差定义为输入迟滞电压VH.

输入可通过3.3 V或5 V器件进行驱动。该特性允许将该器件用作混合3.3 V和5 V应用中的转换器。

74LVC14ABQ: 产品结构框图
sot762-1_3d
数据手册 (1)
名称/描述Modified Date
Hex inverting Schmitt trigger with 5 V tolerant input (REV 6.0) PDF (147.0 kB) 74LVC14A [English]10 Jun 2016
应用说明 (5)
名称/描述Modified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]13 Mar 2013
Pin FMEA for LVC family (REV 1.0) PDF (44.0 kB) AN11009 [English]04 Feb 2011
Power considerations when using CMOS and BiCMOS logic devices (REV 1.0) PDF (100.0 kB) AN263 [English]05 Feb 2002
Interfacing 3 Volt and 5 Volt Applications (REV 1.0) PDF (63.0 kB) AN240 [English]15 Sep 1995
封装信息 (1)
名称/描述Modified Date
plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 x 3 x... (REV 1.0) PDF (187.0 kB) SOT762-1 [English]08 Feb 2016
包装 (1)
名称/描述Modified Date
Standard product orientation 12NC ending 115 (REV 3.0) PDF (108.0 kB) SOT762-1_115 [English]09 Apr 2013
IBIS
SPICE
订购信息
型号状态FamilyVCC (V)功能Logic switching levels说明Output drive capability (mA)Package versiontpd (ns)fmax (MHz)No of bitsPower dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package nameNo of pins
74LVC14ABQActiveLVC1.2 - 3.6Schmitt-triggersCMOS/LVTTLhex inverter Schmitt-trigger+/- 24SOT762-13.21756low-40~12510721.675DHVQFN1414
封装环保信息
产品编号封装说明Outline Version回流/波峰焊接包装产品状态部件编号订购码 (12NC)Marking化学成分RoHS / 无铅 / RHF无铅转换日期EFRIFR(FIT)MTBF(小时)MSLMSL LF
74LVC14ABQSOT762-1Reel 7" Q1/T1Active74LVC14ABQ,115 (9352 734 81115)VC14A74LVC14ABQAlways Pb-free123.83.872.58E811
Hex inverting Schmitt trigger with 5 V tolerant input 74LVC14APW
Sorting through the low voltage logic maze 74LVC_H_245A_Q100
Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
Pin FMEA for LVC family 74LVC1G123_Q100
Power considerations when using CMOS and BiCMOS logic devices 74AHCT244PW
Interfacing 3 Volt and 5 Volt Applications 74LVC377PW
lvc14a IBIS model 74LVC14APW
lvc Spice model 74LVC3G17GT
plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 x 3 x... 74LV164_Q100
Standard product orientation 12NC ending 115 74LV164_Q100
74LVT14
74LV164