74LVC126ADB: Quad buffer/line driver with 5 V tolerant input/outputs; 3-state

The 74LVC126A consists of four non-inverting buffers/line drivers with 3-state outputs, which are controlled by the output enable input (nOE). A LOW at nOE causes the outputs to assume a high-impedance OFF-state.

Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs.

74LVC126ADB: Product Block Diagram

Outline 3d SOT337-1

Data Sheets (1)

Name/Description	Modified Date
Quad buffer/line driver with 5 V tolerant input/outputs; 3-state (REV 8.0) PDF (131.0 kB) 74LVC126A [English]	08 Apr 2014

Application Notes (5)

Name/Description	Modified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]	13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]	13 Mar 2013
Pin FMEA for LVC family (REV 1.0) PDF (44.0 kB) AN11009 [English]	04 Feb 2011
Power considerations when using CMOS and BiCMOS logic devices (REV 1.0) PDF (100.0 kB) AN263 [English]	05 Feb 2002
Interfacing 3 Volt and 5 Volt Applications (REV 1.0) PDF (63.0 kB) AN240 [English]	15 Sep 1995

Selector Guides (2)

Name/Description	Modified Date
ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English]	19 Nov 2015
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English]	08 Jan 2015

Package Information (1)

Name/Description	Modified Date
plastic shrink small outline package; 14 leads; body width 5.3 mm (REV 1.0) PDF (295.0 kB) SOT337-1 [English]	08 Feb 2016

Packing (1)

Name/Description	Modified Date
Standard product orientation 12NC ending 118 (REV 1.0) PDF (86.0 kB) SOT337-1_118 [English]	04 Apr 2013

Supporting Information (2)

Name/Description	Modified Date
Footprint for reflow soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-REFLOW [English]	08 Oct 2009
Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English]	08 Oct 2009

IBIS Model

lvc126a IBIS model (REV 1.0) ibs LVC126A 4/7/2013

SPICE model

lvc Spice model (REV 1.0) ZIP LVC 5/7/2013

Ordering Information

Product	Status	Family	Function	V_CC (V)	Description	Logic switching levels	Output drive capability (mA)	Package version	f_max (MHz)	No of bits	Power dissipation considerations	t_pd (ns)	T_amb (Cel)	R_th(j-a) (K/W)	Ψ_th(j-top) (K/W)	R_th(j-c) (K/W)	Package name	No of pins
74LVC126ADB	Active	LVC	Buffers/inverters/drivers	1.2 - 3.6	quad buffer/line driver (3-state)	CMOS/LVTTL	+/- 24	SOT337-1	175	4	low	2.4	-40~125	156	40.0		SSOP14	14

Package Information

Product ID	Package Description	Outline Version	Reflow/Wave Soldering	Packing	Product Status	Part NumberOrdering code(12NC)	Marking	Chemical Content	RoHS / Pb Free / RHF	LeadFree Conversion Date	EFR	IFR(FIT)	MTBF(hour)	MSL	MSL LF
74LVC126ADB		SOT337-1	SSOP-TSSOP-VSO-REFLOW SSOP-TSSOP-VSO-WAVE SSOP-TSSOP-VSO-REFLOW SSOP-TSSOP-VSO-WAVE	Reel 13" Q1/T1	Active	74LVC126ADB,118 (9352 411 10118)	VC126A	74LVC126ADB		week 13, 2005	123.8	3.87	2.58E8	1	1
74LVC126ADB		SOT337-1		Bulk Pack	Active	74LVC126ADB,112 (9352 411 10112)	VC126A	74LVC126ADB		week 13, 2005	123.8	3.87	2.58E8	1	1