AD9854 CMOS 300 MSPS正交完整DDS

AD9854: CMOS 300 MSPS正交完整DDS

AD9854 功能框图 AD9854数字频率合成器是一款高度集成的器件，采用先进的DDS技术，内置两个高速、高性能正交DAC，共同构成一个数字可编程I与Q频率合成器。以精密时钟源作为基准时，AD9854能产生高度稳定的频率-相位、振幅可编程正弦和余弦输出，可用作通信、雷达和其它许多应用中的捷变LO。创新型高速DDS内核可提供48位频率分辨率（使用300 MHz SYSCLK时，调谐分辨率为1 μHz）。保持17位则可确保该器件具有出色的无杂散动态范围(SFDR)。AD9854的电路架构允许产生频率最高达150 MHz的同步正交输出信号，该输出信号能以最高每秒1亿新频率的速率进行数字式调谐。内部比较器可以将（经过外部滤波的）正弦波输出转换为方波，用于捷变时钟发生器应用。该器件提供两个14位相位寄存器和一个单引脚用于BPSK操作。

针对更高阶PSK操作，利用I/O接口可以实现相位变化。12位I与Q DAC与创新的DDS架构配合，可提供出色的宽带和窄带输出无杂散动态范围(SFDR)。如果不需要正交功能，也可以将Q DAC配置为用户可编程控制DAC。配置比较器时，12位控制DAC还有助于在高速时钟发生器应用中控制静态占空比。两个12位数字乘法器可以对正交输出进行可编程振幅调制、开关输出形键控和精密振幅控制。该器件还具有线性调频(Chirp)功能，便于宽带宽扫频应用。AD9854具有可编程4×至20× REFCLK乘法器电路，可以利用频率较低的外部基准时钟在内部产生300 MHz系统时钟，这样用户实现300 MHz系统时钟源时，既节省了费用，又解决了难题。单端或差分输入也能直接处理300 MHz时钟速率。该器件支持单引脚、传统FSK和频谱质量增强的频率渐变FSK。AD9854利用先进的0.35 μm CMOS技术实现这一高级功能，同时采用3.3 V单电源供电。AD9854与单音频率合成器AD9852引脚兼容，额定温度范围为−40°C至+85°C工业温度范围。

The AD9854 digital synthesizer is a highly integrated device that uses advanced DDS technology, coupled with two internal high speed, high performance quadrature DACs to form a digitally programmable I and Q synthesizer function. When referenced to an accurate clock source, the AD9854 generates highly stable, frequency-phase, amplitude-programmable sine and cosine outputs that can be used as an agile LO in communications, radar, and many other applications. The innovative high speed DDS core of the AD9854 provides 48-bit frequency resolution (1 μHz tuning resolution with 300 MHz SYSCLK). Maintaining 17 bits ensures excellent SFDR.

The circuit architecture of the AD9854 allows the generation of simultaneous quadrature output signals at frequencies up to 150 MHz, which can be digitally tuned at a rate of up to 100 million new frequencies per second. The sine wave output (externally filtered) can be converted to a square wave by the internal comparator for agile clock generator applications. The device provides two 14-bit phase registers and a single pin for BPSK operation.For higher-order PSK operation, the I/O interface can be used for phase changes. The 12-bit I and Q DACs, coupled with the innovative DDS architecture, provide excellent wideband and narrow-band output SFDR. The Q DAC can also be configured as a user-programmable control DAC if the quadrature function is not desired. When configured with the comparator, the 12-bit control DAC facilitates static duty cycle control in high speed clock generator applications.

Two 12-bit digital multipliers permit programmable amplitude modulation, on/off output shaped keying, and precise amplitude control of the quadrature output. Chirp functionality is also included to facilitate wide bandwidth frequency sweeping applications. The programmable 4× to 20× REFCLK multiplier circuit of the AD9854 internally generates the 300 MHz system clock from an external lower frequency reference clock. This saves the user the expense and difficulty of implementing a 300 MHz system clock source.Direct 300 MHz clocking is also accommodated with either single-ended or differential inputs. Single-pin conventional FSK and the enhanced spectral qualities of ramped FSK are supported. The AD9854 uses advanced 0.35 μm CMOS technology to provide a high level of functionality on a single 3.3 V supply.The AD9854 is pin-for-pin compatible with the AD9852 single-tone synthesizer. It is specified to operate over the extended industrial temperature range of −40°C to +85°C.

技术特性

300 MHz内部时钟速率
FSK、BPSK、PSK、线性调频、AM操作
两个集成式12位数模转换器(DAC)
超高速比较器，均方根抖动：3 ps
出色的动态性能：80 dB SFDR (100 MHz ± 1 MHz AOUT)
4×至20×可编程基准时钟乘法器
两个48位可编程频率寄存器
两个14位可编程相位偏移寄存器
12位可编程振幅调制和开关输出形键控功能
单引脚FSK和BPSK数据接口
通过输入/输出接口提供PSK功能
线性或非线性FM线性调频功能，具有单引脚频率保持功能

300 MHz internal clock rate
FSK, BPSK, PSK, chirp, AM operation
Dual integrated 12-bit digital-to-analog converters (DACs)
Ultrahigh speed comparator, 3 ps rms jitter
Excellent dynamic performance 80 dB SFDR at 100 MHz (±1 MHz) AOUT
4× to 20× programmable reference clock multiplier
Dual 48-bit programmable frequency registers
Dual 14-bit programmable phase offset registers
12-bit programmable amplitude modulation and on/off output shaped keying function
Single-pin FSK and BPSK data interfaces
PSK capability via input/output interface
Linear or nonlinear FM chirp functions with single-pin frequency hold function

应用领域

正交LO捷变频
可编程时钟发生器
雷达和扫描系统的FM线性调频源
测试与测量设备
商用与业余RF激励器
Agile, quadrature LO frequency synthesis
Programmable clock generators
FM chirp source for radar and scanning systems
Test and measurement equipment
Commercial and amateur RF exciters

技术指标

Master fclk : 300MHz
Resolution (Bits): 12bit
Tuning Word Width (bits): 48bit
I/O Interface: Parallel,Serial
REFCLK Multiplier: Yes
Compliance Range (V): 1V
FS Iout (mA nom): 10mA

订购指南

产品型号	封装	引脚	温度范围	包装和数量	报价*(100-499)	报价*1000 pcs	RoHS
AD9854AST 产品状态: 停产	80 ld LQFP (14x14mm)	80	工业	Tray, 90	$ 0.00	$ 0.00	N 材料信息
AD9854ASTZ 产品状态: 量产	80 ld LQFP (14x14mm)	80	工业	Tray, 90	$ 19.68	$ 17.10	Y 材料信息
AD9854ASVZ 产品状态: 量产		80	工业	Tray, 90	$ 28.34	$ 25.81	Y 材料信息

开发工具

产品型号	描述	报价	RoHS
AD9854/PCBZ 产品状态: 量产	Evaluation Board	$ 400.00	是