AT49BV802DT 8Mbit,Flash存储器
| Density | 8M |
| Organization | 512K x 16 |
| Speed | 70 ns |
| Vcc (V) | 2.65-3.6 |
| Pb-Free Packages |
TSOP 48 CBGA 48(6x8) |
8M bit (512k x 16/1M x 8), 2.7-Volt, Sectored Flash, Single Plane,Top Boot.
The AT49BV802D(T) is a 2.7-volt 8-megabit Flash memory organized as 524,288 words of 16 bits each or 1,048,576 bytes of 8 bits each. The x16 data appears on I/O0 - I/O15; the x8 data appears on I/O0 - I/O7. The memory is divided into 23 sectors for erase operations. The AT49BV802D(T) is offered in a 48-lead TSOP and a 48-ball CBGA package. The device has CE and OE control signals to avoid any bus contention. This device can be read or reprogrammed using a single power supply, making it ideally suited for in-system programming. The device powers on in the read mode. Command sequences are used to place the device in other operation modes such as program and erase. The device has the capability to protect the data in any sector (see “Sector Lockdown” section). To increase the flexibility of the device, it contains an Erase Suspend and Program Suspend feature. This feature will put the erase or program on hold for any amount of time and let the user read data from or program data to any of the remaining sectors within the memory. The end of a program or an erase cycle is detected by the READY/BUSY pin, Data Polling or by the toggle bit.A six-byte command (Enter Single Pulse Program Mode) sequence to remove the requirement of entering the three-byte program sequence is offered to further improve programming time. After entering the six-byte code, only single pulses on the write control lines are required for writing into the device. This mode (Single Pulse Byte/Word Program) is exited by powering down the device, or by pulsing the RESET pin low for a minimum of 500 ns and then bringing it back to VCC. Erase, Erase Suspend/Resume and Program Suspend/Resume commands will not work while in this mode; if entered they will result in data being programmed into the device. It is not recommended that the six-byte code reside in the software of the final product but only exist in external programming code. The BYTE pin controls whether the device data I/O pins operate in the byte or word configuration. If the BYTE pin is set at logic “1”, the device is in word configuration, I/O0 - I/O15 are active and controlled by CE and OE. If the BYTE pin is set at logic “0”, the device is in byte configuration, and only data I/O pins I/O0 - I/O7 are active and controlled by CE and OE. The data I/O pins I/O8 - I/O14 are tri-stated, and the I/O15 pin is used as an input for the LSB (A-1) address function.
AT49BV802DT 特性
- Single Voltage Read/Write Operation: 2.65V to 3.6V
- Access Time – 70 ns
- Sector Erase Architecture
– Fifteen 32K Word (64K Bytes) Sectors with Individual Write Lockout
– Eight 4K Word (8K Bytes) Sectors with Individual Write Lockout - Fast Byte/Word Program Time – 10 μs
- Fast Sector Erase Time – 100 ms
- Suspend/Resume Feature for Erase and Program
– Supports Reading and Programming from Any Sector by Suspending Erase
of a Different Sector
– Supports Reading Any Byte/Word in the Non-suspending Sectors by Suspending
Programming of Any Other Byte/Word - Low-power Operation
– 10 mA Active
– 15 μA Standby - Data Polling, Toggle Bit, Ready/Busy for End of Program Detection
- RESET Input for Device Initialization
- Sector Lockdown Support
- TSOP and CBGA Package Options
- Top or Bottom Boot Block Configuration Available
- 128-bit Protection Register
- Minimum 100,000 Erase Cycles
- Common Flash Interface (CFI)
- Green (Pb/Halide-free) Packaging
AT49BV802DT 订购型号
| Devices | tACC (ns) |
ICC (mA) | Ordering Code | Package | Operation Range | |
| Active | Standby | |||||
| AT49BV802D | 70 | 25 | 0.025 | AT49BV802D-70CU AT49BV802D-70TU |
48C19 48T |
Industrial (-40° to 85° C) |
| AT49BV802DT | AT49BV802DT-70CU AT49BV802DT-70TU |
48C19 48T |
||||
AT49BV802DT 应用技术支持与电子电路设计开发资源下载
- ATMEL 爱特梅尔Flash 存储器AT49BV802DT 数据手册DataSheet 下载. PDF（PDF 文件格式完整版）
- 并行Flash 产品选型指南（
Excel 文档格式） - ATMEL 爱特梅尔公司全线产品目录. pdf
