| Part | Density | RoHS | Depth | Width | Voltage | Package | Pin Count | Clock Ra | Cycle Ti | Op. Temp. | CL | Data Rate | 数据手册DataSheet下载 |
| MT41J128M8BY-187 | 1Gb | Yes | 128Mb | x8 | 1.5V | FBGA | 86-ball | 533 MHz | 1.875ns | 0C to +8 | CL = 8 | DDR3-1066 | MT41J128M8BY-187 |
| MT41J128M8BY-187E | 1Gb | Yes | 128Mb | x8 | 1.5V | FBGA | 86-ball | 533 MHz | 1.875ns | 0C to +8 | CL = 7 | DDR3-1066 | MT41J128M8BY-187E |
| MT41J128M8BY-25 | 1Gb | Yes | 128Mb | x8 | 1.5V | FBGA | 86-ball | 400 MHz | 2.5ns | 0C to +8 | CL = 6 | DDR3-800 | MT41J128M8BY-25 |
| MT41J128M8BY-25E | 1Gb | Yes | 128Mb | x8 | 1.5V | FBGA | 86-ball | 400 MHz | 1.875ns | 0C to +8 | CL = 5 | DDR3-800 | MT41J128M8BY-25E |
| MT41J256M4BY-187 | 1Gb | Yes | 256Mb | x4 | 1.5V | FBGA | 86-ball | 533 MHz | 1.875ns | 0C to +8 | CL = 8 | DDR3-1066 | MT41J256M4BY-187 |
| MT41J256M4BY-187E | 1Gb | Yes | 256Mb | x4 | 1.5V | FBGA | 86-ball | 533 MHz | 1.875ns | 0C to +8 | CL = 7 | DDR3-1066 | MT41J256M4BY-187E |
| MT41J256M4BY-25 | 1Gb | Yes | 256Mb | x4 | 1.5V | FBGA | 86-ball | 400 MHz | 2.5ns | 0C to +8 | CL = 6 | DDR3-800 | MT41J256M4BY-25 |
| MT41J256M4BY-25E | 1Gb | Yes | 256Mb | x4 | 1.5V | FBGA | 86-ball | 400 MHz | 1.875ns | 0C to +8 | CL = 5 | DDR3-800 | MT41J256M4BY-25E |
| MT41J64M16LA-187 | 1Gb | Yes | 64Mb | x16 | 1.5V | FBGA | 96-ball | 533 MHz | 1.875ns | 0C to +8 | CL = 8 | DDR3-1066 | MT41J64M16LA-187 |
| MT41J64M16LA-187E | 1Gb | Yes | 64Mb | x16 | 1.5V | FBGA | 96-ball | 533 MHz | 1.875ns | 0C to +8 | CL = 7 | DDR3-1066 | MT41J64M16LA-187E |
| MT41J64M16LA-25 | 1Gb | Yes | 64Mb | x16 | 1.5V | FBGA | 96-ball | 400 MHz | 2.5ns | 0C to +8 | CL = 6 | DDR3-800 | MT41J64M16LA-25 |
| MT41J64M16LA-25E | 1Gb | Yes | 64Mb | x16 | 1.5V | FBGA | 96-ball | 400 MHz | 1.875ns | 0C to +8 | CL = 5 | DDR3-800 | MT41J64M16LA-25E |
DDR3(Double Data Rate 3)相比起DDR2有更低的工作电压, 从DDR2的1.8V降落到1.5V,性能更好更为省电;DDR2的4bit预读升级为8bit预读。DDR3目前最高能够1600Mhz的速度,由于目前最为快速的DDR2内存速度已经提升到800Mhz/1066Mhz的速度,因而首批DDR3内存模组将会从1333Mhz的起跳。DDR3在DDR2基础上采用的许多新型设计:8bit预取设计,而DDR2为4bit预取,这样DRAM内核的频率只有接口频率的1/8,DDR3-800的核心工作频率只有100MHz;采用点对点的拓朴架构,以减轻地址/命令与控制总线的负担;采用100nm以下的生产工艺,将工作电压从1.8V降至1.5V,增加异步重置(Reset)与ZQ校准功能等等。