MC100E151: ECL 6-Bit D Flip-Flop Register
The MC10E/100E151 contains 6 D-type, edge-triggered, master-slave flip-flops with differential outputs. Data enters the master when both CLK1 and CLK2 are LOW, and is transferred to the slave when CLK1 or CLK2 (or both) go HIGH. The asynchronous Master Reset (MR) makes all Q outputs go LOW.
技术特性
- 1100MHz Min. Toggle Frequency
- Differential Outputs
- Asynchronous Master Reset
- Dual Clocks
- PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V
- NECL Mode Operating Range: VCC = 0 V with VEE = -4.2 V to -5.7 V
- Internal Input Pulldown Resistors
- ESD Protection: > 2 kV HBM, > 200 V MM
- Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
- Moisture Sensitivity Level 1
For Additional Information, see Application Note AND8003/D
- Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34
- Transistor Count = 304 devices
- Pb-Free Packages are Available
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封装图 MARKING DIAGRAM
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订购信息 Ordering Information
| 产品 |
状况 |
Compliance |
具体说明 |
封装 |
MSL* |
容器 |
预算价格 (1千个数量的单价） |
| 类型 |
外形 |
类型 |
数量 |
| MC100E151FNG |
Active |
|
ECL 6-Bit D Flip-Flop Register |
PLCC-28 |
776-02 |
3 |
Tube |
37 |
|
| MC100E151FNR2G |
Active |
|
ECL 6-Bit D Flip-Flop Register |
PLCC-28 |
776-02 |
3 |
Tape and Reel |
500 |
|
数据资料DataSheet下载
