MC100EL14:5.0 V ECL 1:5 Clock Fanout Buffer

The MC100EL14 is a low skew 1:5 clock distribution chip designed explicitly for low skew clock distribution applications. The BBpin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 F capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open.

特性
  • 50 ps Output-to-Output Skew
  • Synchronous Enable/Disable
  • Multiplexed Clock Input
  • ESD Protection: > 2 KV HBM, > 200 V MM
  • The 100 Series Contains Temperature Compensation
  • PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V
  • NECL Mode Operating Range: VCC = 0 V with VEE = -4.2 V to -5.7 V
  • Internal Input Pulldown Resistors on CLK, SCLK, SEL, and ENbar.
  • Q Output will Default LOW with Inputs Open or at VEE
  • Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
  • Moisture Sensitivity Level 1
    For Additional Information, see Application Note AND8003/D
  • Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34
  • Transistor Count = 303 devices
  • Pb-Free Packages are Available
封装图 PACKAGE DIMENSIONS

MC100EL14封装图

订购信息 Ordering Information
产品 状况 Compliance 具体说明 封装 MSL* 容器 预算价格 (1千个数量的单价)
类型 外形 类型 数量
MC100EL14DWG Active
Pb-free
Halide free
5.0 V ECL 1:5 Clock Fanout Buffer SOIC-20W 751D-05 3 Tube 38  
MC100EL14DWR2G Active
Pb-free
Halide free
5.0 V ECL 1:5 Clock Fanout Buffer SOIC-20W 751D-05 3 Tape and Reel 1000  
数据资料DataSheet下载
概述 文档编号/大小 版本
5.0 V ECL 1:5 Clock Fanout Buffer MC100EL14/D (94.0kB) 2