MC100EPT24:Translator, LVTTL / LVCMOS to Differential LVECL

The MC100EPT24 is a LVTTL/LVCMOS to differential LVECL translator. Because LVECL levels and LVTTL/LVCMOS levels are used, a -3.3V, +3.3V and ground are required. The small outline 8-lead SOIC package and the single gate of the EPT24 makes it ideal for those applications where space, performance, and low power are at a premium.

技术特性
  • 350ps Typical Propagation Delay
  • Maximum Frequency > 1.0GHz
  • The 100 Series Contains Temperature Compensation
  • Operating Range: VCC= 3.0 V to 3.6 V; VEE= -3.6 V to -3.0 V; GND = 0 V
  • PNP LVTTL Inputs for Minimal Loading
  • Q Output will default HIGH with inputs open
  • Pb-Free Packages are Available
封装图 MARKING DIAGRAM

MC100EPT24 封装图

订购信息 Ordering Information
产品 状况 Compliance 具体说明 封装 MSL* 容器 预算价格 (1千个数量的单价)
类型 外形 类型 数量
MC100EPT24DG Active
Pb-free
Halide free
Translator, LVTTL / LVCMOS to Differential LVECL SOIC-8 751-07 1 Tube 98  
MC100EPT24DR2G Active
Pb-free
Halide free
Translator, LVTTL / LVCMOS to Differential LVECL SOIC-8 751-07 1 Tape and Reel 2500  
MC100EPT24DTG Active
Pb-free
Halide free
Translator, LVTTL / LVCMOS to Differential LVECL TSSOP-8 948R-02 3 Tube 100  
MC100EPT24DTR2G Active
Pb-free
Halide free
Translator, LVTTL / LVCMOS to Differential LVECL TSSOP-8 948R-02 3 Tape and Reel 2500  
MC100EPT24MNR4G Active
Pb-free
Halide free
Translator, LVTTL / LVCMOS to Differential LVECL DFN-8 506AA 1 Tape and Reel 1000  
数据资料DataSheet下载
概述 文档编号/大小 版本
Translator, LVTTL / LVCMOS to Differential LVECL MC100EPT24-D(417.0kB) 1