MC100LVEL14:3.3 V ECL 1:5 Clock Distribution Chip
The MC100LVEL14 is a low skew 1:5 clock distribution chip designed explicitly for low skew clock distribution applications. The device can be driven by either a differential or single-ended ECL or, if positive power supplies are used, PECL input signal. The LVEL14 is functionally and pin compatible with the EL14 but is designed to operate in ECL or PECL mode for a voltage supply range of -3.0 V to -3.8 V ( or 3.0 V to 3.8 V).
特性
- 50ps Output-to-Output Skew
- Synchronous Enable/Disable
- Multiplexed Clock Input
- ESD Protection: >2 KV HBM
- The 100 Series Contains Temperature Compensation
- PECL Mode Operating Range: VCC = 3.0 V to 3.8 V
with VEE = 0 V
- NECL Mode Operating Range: VCC = 0 V
with VEE = -3.0 V to -3.8 V
- Internal Input Pulldown Resistors on CLK
- Q Output will Default LOW with Inputs Open or at VEE
- Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
- Moisture Sensitivity Level 1
For Additional Information, see Application Note AND8003/D
- Flammability Rating: UL-94 code V-0 @ 1/8",
Oxygen Index 28 to 34
- Transistor Count = 303 devices
- Pb-Free Packages are Available
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封装图 PACKAGE DIMENSIONS
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订购信息 Ordering Information
| 产品 |
状况 |
Compliance |
具体说明 |
封装 |
MSL* |
容器 |
预算价格 (1千个数量的单价） |
| 类型 |
外形 |
类型 |
数量 |
| MC100LVEL14DWG |
Active |
|
3.3 V ECL 1:5 Clock Distribution Chip |
SOIC-20W |
751D-05 |
3 |
Tube |
38 |
|
| MC100LVEL14DWR2G |
Active |
|
3.3 V ECL 1:5 Clock Distribution Chip |
SOIC-20W |
751D-05 |
3 |
Tape and Reel |
1000 |
|
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