MC100LVEL38:3.3 V ECL ÷·2, ÷·4/6 Clock Generator Chip
The MC100LVEL38 is a low skew w 2, w 4/6 clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The device can be driven by either a differential or single-ended input signal.
技术特性
- 50 ps Maximum Output-to-Output Skew
- Synchronous Enable/Disable
- Master Reset for Synchronization
- ESD Protection: >2 KV HBM
- The 100 Series Contains Temperature Compensation
- PECL Mode Operating Range: VCC = 3.0 V to 3.8 V
with VEE = 0 V
- NECL Mode Operating Range: VCC = 0 V
with VEE = -3.0 V to -3.8 V
- Internal Input Pulldown Resistors
- Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
- Moisture Sensitivity Level 1
For Additional Information, see Application Note AND8003/D
- Flammability Rating: UL-94 code V-0 @ 1/8",
Oxygen Index 28 to 34
- Transistor Count = 388 devices
- Pb-Free Packages are Available
|
封装图 MARKING DIAGRAM
|
订购信息 Ordering Information
| 产品 |
状况 |
Compliance |
具体说明 |
封装 |
MSL* |
容器 |
预算价格 (1千个数量的单价） |
| 类型 |
外形 |
类型 |
数量 |
| MC100LVEL38DWG |
Active |
|
3.3 V ECL ÷·2, ÷·4/6 Clock Generator Chip |
SOIC-20W |
751D-05 |
3 |
Tube |
38 |
|
| MC100LVEL38DWR2G |
Active |
|
3.3 V ECL ÷·2, ÷·4/6 Clock Generator Chip |
SOIC-20W |
751D-05 |
3 |
Tape and Reel |
1000 |
|
数据资料DataSheet下载
