MC10E167: 5.0 V ECL 6-Bit 2:1 Mux-Register
The MC10E/100E167 contains six 2:1 multiplexers followed by D flip-flops with single-ended outputs. Input data are selected by the Select control, SEL. The selected data are transferred to the flip-flop outputs by a positive edge on CLK1 or CLK2 (or both). A HIGH on the Master Reset (MR) pin asynchronously forces all Q outputs LOW.
技术特性
- 1000MHz Min. Operating Frequency
- 800ps Max. Clock to Output
- Single-Ended Outputs
- Asynchronous Master Resets
- Dual Clocks
- PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V
- NECL Mode Operating Range: VCC = 0 V with VEE = -4.2 V to -5.7 V
- Internal Input Pulldown Resistors
- ESD Protection: > 1 kV HBM, > 75 V MM
- Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
- Moisture Sensitivity Level 1
For Additional Information, see Application Note AND8003/D
- Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34
- Transistor Count = 323 devices
- Pb-Free Packages are Available
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封装图 MARKING DIAGRAM
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订购信息 Ordering Information
产品 |
状况 |
Compliance |
具体说明 |
封装 |
MSL* |
容器 |
预算价格 (1千个数量的单价) |
类型 |
外形 |
类型 |
数量 |
MC10E167FNG |
Last Shipments |
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5.0 V ECL 6-Bit 2:1 Mux-Register |
PLCC-28 |
776-02 |
3 |
Tube |
37 |
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MC10E167FNR2G |
Active |
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5.0 V ECL 6-Bit 2:1 Mux-Register |
PLCC-28 |
776-02 |
3 |
Tape and Reel |
500 |
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