MC10E195:5.0 V ECL Programmable Delay Chip

The MC10E/100E195 is a programmable delay chip (PDC) designed primarily for clock de-skewing and timing adjustment. It provides variable delay of a differential ECL input transition

技术特性
  • 2.0ns Worst Case Delay Range
  • 20ps/Delay Step Resolution
  • >1.0GHz Bandwidth
  • On Chip Cascade Circuitry
  • PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V
  • NECL Mode Operating Range: VCC = 0 V with VEE = -4.2 V to -5.7 V
  • Internal Input Pulldown Resistors
  • ESD Protection: > 2 kV HBM, > 200 V MM
  • Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
  • Moisture Sensitivity Level 1
    For Additional Information, see Application Note AND8003/D
  • Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34
  • Transistor Count = 368 devices
  • Pb-Free Packages are Available
封装图 MARKING DIAGRAM

MC10E195 封装图

订购信息 Ordering Information
产品 状况 Compliance 具体说明 封装 MSL* 容器 预算价格 (1千个数量的单价)
类型 外形 类型 数量
MC10E195FNR2G Active
Pb-free
Halide free
5.0 V ECL Programmable Delay Chip PLCC-28 776-02 3 Tape and Reel 500  
数据资料DataSheet下载
概述 文档编号/大小 版本
5.0 V ECL Programmable Delay Chip MC10E195-D(417.0kB) 1