MC10EL15:5.0 V ECL 1:4 Clock Distribution Chip

The MC10EL/100EL15 is a low skew 1:4 clock distribution chip designed explicitly for low skew clock distribution applications. The device can be driven by either a differential or single-ended ECL or, if positive power supplies are used, PECL input signal. If a single-ended input is to be used the VBB output should be connected to the CLK input and bypassed to ground via a 0.01 F capacitor. The VBB output is designed to act as the switching reference for the input of the EL15 under single-ended input conditions, as a result this pin can only source/sink up to 0.5mA of current. 

特性
  • 50ps Output-to-Output Skew
  • Synchronous Enable/Disable
  • Multiplexed Clock Input
  • ESD Protection: > 1 KV HBM, > 100 V MM
  • PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V
  • NECL Mode Operating Range: VCC = 0 V with VEE = -4.2 V to -5.7 V
  • Internal Input Pulldown Resistors on CLKs, SCLK, SEL, and ENbar.
  • Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
  • Moisture Sensitivity Level 1
    For Additional Information, see Application Note AND8003/D
  • Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34
  • Transistor Count = 103 devices
  • Pb-Free Packages are Available
封装图 PACKAGE DIMENSIONS

MC10EL15封装图

订购信息 Ordering Information
产品 状况 Compliance 具体说明 封装 MSL* 容器 预算价格 (1千个数量的单价)
类型 外形 类型 数量
MC10EL15DG Active
Pb-free
Halide free
5.0 V ECL 1:4 Clock Distribution Chip SOIC-16 751B-05 1 Tube 48  
MC10EL15DR2G Active
Pb-free
Halide free
5.0 V ECL 1:4 Clock Distribution Chip SOIC-16 751B-05 1 Tape and Reel 2500  
数据资料DataSheet下载
概述 文档编号/大小 版本
5.0 V ECL 1:4 Clock Distribution Chip MC10EL15/D (94.0kB) 2