MC74HC73A:Dual J-K Flip-Flop with Reset
High Performance Silicon Gate CMOS. The MC74HC73A is identical in pinout to the LS73. The device inputs are compatible with standard CMOS outputs, with pullup resistors, they are compatible with LSTTL outputs. Each flip flop is negative edge clocked and has an active low asynchronous reset. The MC74HC73A is identical in function to the HC107, but has a different pinout
技术特性
- Output Drive Capability: 10 LSTTL Loads
- Outputs Directly Interface to CMOS, NMOS, and TTL
- Operating Voltage Range: 2.0 to 6.0 V
- Low Input Current: 1.0 µA
- High Noise Immunity Characteristic of CMOS Devices
- In Compliance with the JEDEC Standard No. 7.0 A Requirements
- Chip Complexity: 92 FETs or 23 Equivalent Gates
- These are PbFree Devices
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封装图 MARKING DIAGRAM
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订购信息 Ordering Information
产品 |
状况 |
Compliance |
具体说明 |
封装 |
MSL* |
容器 |
预算价格 (1千个数量的单价) |
类型 |
外形 |
类型 |
数量 |
MC74HC73ADG |
Active |
|
Dual J-K Flip-Flop with Reset |
SOIC-14 |
751A-03 |
1 |
Tube |
55 |
$0.2408
|
MC74HC73ADR2G |
Active |
|
Dual J-K Flip-Flop with Reset |
SOIC-14 |
751A-03 |
1 |
Tape and Reel |
2500 |
$0.2408 |
MC74HC73ADTG |
Active |
|
Dual J-K Flip-Flop with Reset |
TSSOP-14 |
948G-01 |
1 |
Tube |
96 |
$0.2408 |
MC74HC73ADTR2G |
Active |
|
Dual J-K Flip-Flop with Reset |
TSSOP-14 |
948G-01 |
1 |
Tape and Reel |
2500 |
$0.2408 |
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