技术特性

• 2.0 V to 6.0 V VCC Operation
• Low Input Current: 1.0 uA
• Max tpd of 6.5 ns at 5 V
• Typical VOLP (Output Ground Bounce) < 0.8 V
  at VCC = 3.3 V, TA = 25C
• Typical VOHV (Output VOH Undershoot) > 2.3 V
  at VCC = 3.3 V, TA = 25C
• Support MixedMode Voltage Operation on All Ports
• 8Bit SerialIn, ParallelOut Shift Registers With Storage
• Independent Direct Overriding Clears on Shift and Storage Registers
• Independent Clocks for Shift and Storage Registers
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
  No. 7A
• These Devices are PbFree, Halogen Free/BFR Free and are RoHS
  Compliant

封装图 MARKING DIAGRAM