NB3L83948C:2.5 V / 3.3 V Differential and LVTTL/LVCMOS 2:1 MUX Input Clock Buffer with 1:12 LVCMOS Fanout
The NB3L83948C/100EP116 is a 6-bit differential line receiver based on the EP16 device. The 3.0GHz bandwidth provided by the high frequency outputs makes the device ideal for buffering of very high speed oscillators.
特性
- 260 ps Typical Propagation Delay
- Maximum Frequency > 3 GHz Typical
- PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V
- NECL Mode Operating Range: VCC = 0 V with VEE =-3.0 V to -5.5 V
- Open Input Default State
- Safety Clamp on Inputs
- Q Output will default LOW with inputs open or at VEE
- VBB Output
- Pb-Free Packages are Available
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封装图 PACKAGE DIMENSIONS
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订购信息 Ordering Information
| 产品 |
状况 |
Compliance |
具体说明 |
封装 |
MSL* |
容器 |
预算价格 (1千个数量的单价） |
| 类型 |
外形 |
类型 |
数量 |
| NB3L83948CFAG |
Active |
|
2.5 V / 3.3 V Differential and LVTTL/LVCMOS 2:1 MUX Input Clock Buffer with 1:12 LVCMOS Fanout |
LQFP-32 |
873A-02 |
2 |
Tray JEDEC |
250 |
|
| NB3L83948CFAR2G |
Active |
|
2.5 V / 3.3 V Differential and LVTTL/LVCMOS 2:1 MUX Input Clock Buffer with 1:12 LVCMOS Fanout |
LQFP-32 |
873A-02 |
2 |
Tape and Reel |
2000 |
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