NB4L16M:Translator, 2.5 V / 3.3 V, 5 Gb/s Multi Level, Clock/Data Input to CML, Driver / Receiver / Buffer, with Internal Termination

The NB4L16M is a differential driver/receiver/buffer/translator which can accept LVPECL, LVDS, CML, LVCMOS/LVTTL and produce 400 mV CML output. The device is housed in a 3x3 mm 16 pin QFN package.

特性
  • Maximum Input Clock Frequency > 3.5 GHz Typical
  • Maximum Input Data Frequency > 5 Gb/s Typical
  • 220 ps Typical Propagation Delay
  • 65 ps Typical Rise and Fall Times
  • CML Output with Operating Range: VCC = 2.375 V to 3.8 V with VEE = 0 V
  • CML Output Level (400 mV Peak-to-Peak Output), Differential Output Only
  • 50 Ω Internal Input and Output Termination Resistors
  • Functionally Compatible with Existing 2.5 V / 3.3 V LVEL, LVEP, EP, and SG Devices
  • Pb-Free Packages are Available
封装图 PACKAGE DIMENSIONS

NB4L16M封装图

订购信息 Ordering Information
产品 状况 Compliance 具体说明 封装 MSL* 容器 预算价格 (1千个数量的单价)
类型 外形 类型 数量
NB4L16MMNG Active
Pb-free
Halide free
Translator, 2.5 V / 3.3 V, 5 Gb/s Multi Level, Clock/Data Input to CML, Driver / Receiver / Buffer, with Internal Termination QFN-16 485AE 1 Tube 123  
NB4L16MMNR2G Active
Pb-free
Halide free
Translator, 2.5 V / 3.3 V, 5 Gb/s Multi Level, Clock/Data Input to CML, Driver / Receiver / Buffer, with Internal Termination QFN-16 485AE 1 Tape and Reel 3000  
数据资料DataSheet下载
概述 文档编号/大小 版本
Translator, 2.5 V / 3.3 V, 5 Gb/s Multi Level, Clock/Data Input to CML, Driver / Receiver / Buffer, with Internal Termination NB4L16M/D (94.0kB) 2