NB7L14M: 2.5 V / 3.3 V, 12 Gb/s Differential 1:4 Clock/Data Fanout Buffer/Translator with CML Outputs and Internal Termination

The NB7L14M is a differential 1-to-4 clock/data distribution chip with internal source termination and CML output structure, optimized for low skew and minimal jitter. The device produces two identical output copies of clock or data operating up to 8 GHz or 12 Gb/s, respectively

特性
  • Maximum Input Clock Frequency up to 8 GHz Typical
  • Maximum Input Data Rate up to 12Gb/s Typical
  • < 0.5 ps Maximum RMS Clock Jitter
  • < 10 ps Data Dependant Jitter
  • 30 ps Typical Rise & Fall Times
  • 110 ps Typical Propagation Delay
  • 6 ps Typical Within Device Skew
  • Operating Range: VCC = 2.375 V to 3.465 V with VEE = 0 V
  • CML Output Level (400 mV Peak-to-Peak Output)Differential Output Only
  • 50Ω Input and Output Termination Resistors
  • Functionally Compatible with Existing 2.5 V / 3.3V LVEL, LVEP, EP, and SG Devices
  • Pb-Free Packages are Available
封装图 PACKAGE DIMENSIONS

NB7L14M封装图

订购信息 Ordering Information
产品 状况 Compliance 具体说明 封装 MSL* 容器 预算价格 (1千个数量的单价)
类型 外形 类型 数量
NB7L14MMNG Active
Pb-free
Halide free
2.5 V / 3.3 V, 12 Gb/s Differential 1:4 Clock/Data Fanout Buffer/Translator with CML Outputs and Internal Termination QFN-16 485G-01 1 Tube 123  
NB7L14MMNR2G Active
Pb-free
Halide free
2.5 V / 3.3 V, 12 Gb/s Differential 1:4 Clock/Data Fanout Buffer/Translator with CML Outputs and Internal Termination QFN-16 485G-01 1 Tape and Reel 3000  
数据资料DataSheet下载
概述 文档编号/大小 版本
2.5 V / 3.3 V, 12 Gb/s Differential 1:4 Clock/Data Fanout Buffer/Translator with CML Outputs and Internal Termination NB7L14M/D (94.0kB) 2