NB7V585M:1.8 V / 2.5 V Differential 2:1 Mux Input to 1:6 CML Clock/Data Fanout Buffer/Translator
The NB7V585M is a differential 1-to-6 CML clock/data distribution chip featuring a 2:1 Clock/Data input multiplexer with an input select pin. The INx/INxb inputs incorporate internal 50-ohm termination resistors and will accept LVPECL, CML, or LVDS logic levels. The NB7V585M produces six identical output copies of clock or data operating up to 7GHz or 10.7Gb/s, respectively. As such, NB7V585M is ideal for SONET, GigE, Fiber Channel, Backplane and other clock/data distribution applications. The 16mA differential CML output structure provides matching internal 50-ohm source terminations, 400mV output swings when externally terminated with a 50-ohm resistor to VCC and is optimized for low skew and minimal jitter. The NB7V585M is powered with either 1.8V or 2.5V supply and is offered in a low profile 5x5mm 32-pin QFN package.
技术特性
- Maximum Input Data Rate > 10 Gb/s Typical
- Data Dependent Jitter < 10 ps
- Maximum Input Clock Frequency > 6 GHz Typical
- Random Clock Jitter < 0.8 ps RMS, Max
- Low Skew 1:6 CML Outputs, 20 ps Max
- 2:1 MultiLevel Mux Inputs
- 175 ps Typical Propagation Delay
- 50 ps Typical Rise and Fall Times
- Operating Range: VCC = 1.71 V to 1.89 V
- Internal 50-ohm Input Termination Resistors
- VREFAC Reference Output
- 40C to +85C Ambient Operating Temperature
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封装图 MARKING DIAGRAM
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订购信息 Ordering Information
| 产品 |
状况 |
Compliance |
具体说明 |
封装 |
MSL* |
容器 |
预算价格 (1千个数量的单价） |
| 类型 |
外形 |
类型 |
数量 |
| NB7V585MMNG |
Active |
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1.8 V / 2.5 V Differential 2:1 Mux Input to 1:6 CML Clock/Data Fanout Buffer/Translator |
QFN-32 |
488AM |
1 |
Tube |
74 |
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| NB7V585MMNR4G |
Active |
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1.8 V / 2.5 V Differential 2:1 Mux Input to 1:6 CML Clock/Data Fanout Buffer/Translator |
QFN-32 |
488AM |
1 |
Tape and Reel |
1000 |
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