SPC56EL60L5 32-bit Microcontroller for Automotive
The SPC56EL60xx is a compatible extension to the STMicroelectronics product roadmap for Safety and Chassis application field. It targets the Electric Power Steering and those applications requiring a high Safety Integrity Level (SIL).
All devices in this family are built around a dual core safety platform with an innovative safety concept targeting ISO 26262 ASILD and IEC 61508 SIL3 integrity levels. In order to minimize additional software and module level features to reach this target, on-chip redundancy is offered for the critical components of the microcontroller (CPU core, DMA controller, interrupt controller, crossbar bus system, memory protection unit, flash memory and RAM controllers, peripheral bus bridge, system timers, and watchdog timer). Lock Step Redundancy Checking Units are implemented at each output of this Sphere of Replication (SoR). ECC is available for on-chip RAM and flash memories. A programmable fault collection and control unit monitors the integrity status of the device and provides flexible safe state control.
功能框图
SPC56EL60L5 订购信息
| 订购型号 |
产品状态 |
美金价格 |
数量 |
封装 |
包装形式 |
温度范围 |
材料声明 |
| SPC56EL60L5CBFXY |
Preview |
|
1000 |
LQFP 144 20x20x1.4 |
Tray |
|
SPC56EL60L5CBFXY |
DATASHEET
| 描述 |
版本 |
大小 |
| DB0791: 32-bit Power Architecture® microcontroller for automotive SIL3/ASILD chassis and safety applications |
5 |
439KB |
APPLICATION NOTES
| 描述 |
版本 |
大小 |
| AN3324: Implementing power-on self tests for SPC56EL60 in locked step |
1 |
262KB |
| AN4035: Flash programming through Nexus/JTAG |
1 |
635KB |
ERRATA SHEETS
| 描述 |
版本 |
大小 |
| ES0005: SPC56EL60x device errata JTAG_ID = 0x1AEA3041 |
3 |
110KB |
TECHNICAL NOTES
| 描述 |
版本 |
大小 |
| TN0436: SPC56EL60xx- differences between cut 1.0 and cut 2.0 |
1 |
87KB |
