SPEAr320S Embedded MPU

SPEAr320S is a member of the SPEAr family of embedded MPUs and is optimized for industrial automation and consumer markets. The device is based on the ARM926EJ-S processor (up to 333 MHz), widely used in applications where the processing performance is required to be higher than the one achievable with microcontrollers.

SPEAr320S provides an integrated MMU (memory management unit) which enables to support high-level operating systems (HLLs), such as Linux and Windows Embedded Compact 7. In addition, a rich set of integrated peripherals (memory interfaces, connectivity, HMI, cryptography) allows the device to be used in a wide range of embedded applications.

The SPEAr320S architecture is based on multiple functional blocks interacting through a multilayer interconnection bus matrix. The switch matrix structure allows different subsystem data flows to be executed in parallel improving the core platform efficiency. High performance master agents are directly interconnected with the memory controller reducing the memory access latency. The overall memory bandwidth assigned to each master port can be programmed and optimized through an internal efficient weighted round-robin arbitration mechanism.

The SPEAr320S device is fully backward-compatible with the previous SPEAr320 product at both hardware and software programming levels. The extended functionality is achieved by enhanced I/O multiplexing, preserving the same pinout and ball map, as well as by a new software-definable configuration mode.

技术特性
SPEAr320S 订购信息
订购型号 产品状态 美金价格 数量 封装 包装形式 温度范围 材料声明
SPEAr320S-2 Active   1000 LFBGA 289 15x15x1.7 Tube -40 °C-85 °C SPEAr320S-2
DATASHEET
描述 版本 大小
SPEAr320S : Embedded MPU with ARM926 core for industrial and consumer applications 1 1259KB
APPLICATION NOTES
描述 版本 大小
AN3123: Using the UART interfaces in the SPEAr embedded MPU family 2 219KB
AN2641: Using the color LCD controller (CLCD) in the SPEAr embedded MPU family 1 420KB
AN3129: Real-time performance using FIQ interrupt handling in SPEAr MPUs 1 189KB
AN2674: PCB layout guidelines for SPEAr3xx 2 544KB
AN3099: IBIS models for signal integrity simulation of SPEAr3xx applications 1 221KB
AN3140: How to configure the SPEAr3xx general purpose timers (GPTs) 1 267KB
AN3100: Configuring the SPEAr3xx multi-port memory controller (MPMC) for external DDR SDRAM 2 303KB
REFERENCE MANUALS
描述 版本 大小
RM0319: SPEAr320S architecture and functionality 1 3394KB
RM0321: SPEAr320S address map and registers 1 3641KB
ERRATA SHEETS
描述 版本 大小
ES0132: SPEAr320S embedded MPU known limitations 2 55KB
RELEASE NOTES
描述 版本 大小
RN0080: Linux support package for SPEAr (LSP) v 2.3.2 1 87KB
RN0053: Linux support package for SPEAr (LSP) v 2.3 1 81KB
RN0081: Linux support package (LSP) v3.2.3 for SPEAr eMPU family 1 247KB
USER MANUALS
描述 版本 大小
UM1535: Getting started with SPEAr Linux support package (LSP3.2.3) 1 500KB
UM1038: Hardware interconnection of the STM32™, SPEAr™3xx, and ST75xx 1 797KB
UM1535: Getting started with SPEAr Linux support package (LSP3.2.3) 1 500KB
UM0844: Getting started with SPEAr® Linux support package (LSP2.3) 3 702KB
UM0804: EVALSPEAr320S - evaluation board for the SPEAr320S 2 529KB
PRODUCT PRESENTATIONS
描述 版本 大小
SPEAr eMPUs - product presentation 2.0.0 665KB
FLYERS
描述 版本 大小
SPEAr320S embedded microprocessor 1.0.0 292KB
MARKETING BROCHURES
描述 版本 大小
SPEAr family of embedded microprocessors 1.0.0 733KB