技术特性

• Dual ARM926EJ-S core up to 333 MHz:
  • Each with 16 Kbytes instruction cache + 16 Kbytes data cache
• High performance 8-channel DMA
• Dynamic power saving features
• Up to 733 DMIPS
• Memory:
  • External DRAM interface: 8/16-bit DDR1-333 / DDR2 - 666
  • 32 Kbytes BootROM / 8 Kbytes internal SRAM
  • Flexible static memory controller (FSMC) supporting parallel NAND Flash memory interface, ONFI 1.0 support, internal 1-bit ECC or external 4-bit ECC
  • Serial NOR Flash Memory interface
• Connectivity:
  • 2 x USB 2.0 Host
  • USB 2.0 Device
  • Giga Ethernet (GMII port)
  • I²C and fast IrDA interfaces
  • 3 x SSP Synchronous serial peripheral (SPI, Microwire or TI protocol) ports
  • 2 x UART interfaces
• Peripherals supported:
  • TFT/STN LCD controller (resolution up to 1024 x 768 and colors up to 24 bpp)
  • Touchscreen support
• Miscellaneous functions
  • Integrated real-time clock, watchdog, and system controller
  • 8-channel 10-bit ADC, 1 Msps
  • JPEG codec accelerator
  • 10 GPIO bidirectional signals with interrupt capability
  • 10 independent 16-bit timers with programmable prescaler
• 32-bit width External local bus (EXPI interface).
• 3 x I2S interfaces for audio features:
  • One stereo input and two stereo outputs (audio 3.1 configuration capable)
• Customizable logic with 600 Kgate standard cell array
• Software:
  • System compliant with all operating systems (including Linux)

功能框图