ST10F273E 16-bit MCU with 256 Kbyte Flash memory and 12 Kbyte RAM
The ST10F273E device is a derivative of the STMicroelectronics ST10 family of 16-bit single-chip CMOS microcontrollers.
The ST10F273E combines high CPU performance (up to 32 million instructions per second) with high peripheral functionality and enhanced I/O-capabilities. It also provides on-chip high-speed single voltage Flash memory, on-chip high-speed RAM, and clock generation via PLL.
ST10F273E is processed in 0.18mm CMOS technology. The MCU core and the logic is supplied with a 5 V to 1.8 V on-chip voltage regulator. The part is supplied with a single 5 V supply and I/Os work at 5 V.
The device is upward compatible with the ST10F269 device, with the following set of differences:
Flash control interface is now based on STMicroelectronics third generation of stand-alone Flash memories (M29F400 series), with an embedded Program/Erase Controller. This completely frees up the CPU during programming or erasing the Flash.
Only one supply pin (ex DC1 in ST10F269, renamed into V18) on the QFP144 package is used for decoupling the internally generated 1.8V core logic supply. Do not connect this pin to 5.0 V external supply. Instead, this pin should be connected to a decoupling capacitor (ceramic type, typical value 10nF, maximum value 100nF).
The AC and DC parameters are modified due to a difference in the maximum CPU frequency.
A new VDD pin replaces DC2 of ST10F269.
EA pin assumes a new alternate functionality: it is also used to provide a dedicated power supply (see VSTBY) to maintain biased a portion of the XRAM (16 Kbytes) when the main Power Supply of the device (VDD and consequently the internally generated V18) is turned off for low power mode, allowing data retention. VSTBY voltage shall be in the range 4.5 to 5.5 volts and a dedicated embedded low power voltage regulator is in charge to provide the 1.8 V for the RAM, the low-voltage section of the 32 kHz oscillator and the Real Time Clock module when not disabled. It is allowed to exceed the upper limit up to 6 V for a very short period of time during the global life of the device and exceed the lower limit down to 4 V when RTC and 32 kHz on-chip oscillator are not used.
A second SSC mapped on the XBUS is added (SSC of ST10F269 becomes here SSC0, while the new one is referred as XSSC or simply SSC1). Note that some restrictions and functional differences due to the XBUS peculiarities are present between the classic SSC and the new XSSC.
A second ASC mapped on the XBUS is added (ASC0 of ST10F269 remains ASC0, while the new one is referred as XASC or simply as ASC1). Note that some restrictions and functional differences due to the XBUS peculiarities are present between the classic ASC and the new XASC.
A second PWM mapped on the XBUS is added (PWM of ST10F269 becomes here PWM0, while the new one is referred as XPWM or simply as PWM1). Note that some restrictions and functional differences due to the XBUS peculiarities are present between the classic PWM and the new XPWM.
An I²C interface on the XBUS is added (see X-I²C or simply I²C interface).
CLKOUT function can output either the CPU clock (like in ST10F269) or a software programmable prescaled value of the CPU clock.
On-chip RAM memory and FLASH size have been increased.
PLL multiplication factors have been adapted to new frequency range.
A/D Converter is not fully compatible versus ST10F269 (timing and programming model). Formula for the conversion time is still valid, while the sampling phase programming model is different.
Besides, additional 8 channels are available on P1L pins as alternate function: The accuracy reachable with these extra channels is reduced with respect to the standard Port5 channels.
External Memory bus is affected by limitations on maximum speed and maximum capacitance load: ST10F273E is not able to address an external memory at 64 MHz with 0 wait states.
XPERCON register bit mapping modified according to new peripherals implementation (not fully compatible with ST10F269).
Bondout chip for emulation (ST10R201) cannot achieve more than 50MHz at room temperature (so no real time emulation possible at maximum speed).
Input section characteristics are different. The threshold programmability is extended to all port pins (additional XPICON register); it is possible to select standard TTL (with up to 400mV of hysteresis) and standard CMOS (with up to 750mV of hysteresis).
Output transition is not programmable.
CAN module is enhanced: ST10F273E implements two C-CAN modules, so the programming model is slightly different. Besides, the possibility to map in parallel the two CAN modules is added (on P4.5/P4.6).
On-chip main oscillator input frequency range has been reshaped, reducing it from 1 to 25 MHz down to 4 to 8 MHz. This is a low power oscillator amplifier, that allows a power consumption reduction when Real Time Clock is running in Power down mode, using as reference the on-chip main oscillator clock. When this on-chip amplifier is used as reference for Real Time Clock module, the Power-down consumption is dominated by the consumption of the oscillator amplifier itself.
A second on-chip oscillator amplifier circuit (32 kHz) is implemented for low power modes: it can be used to provide the reference to the Real Time Clock counter (either in Power down or Stand-by mode). Pin XTAL3 and XTAL4 replace a couple of VDD/VSS pins of ST10F269.
技术特性
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功能框图 |
ST10F273E 订购信息
| 订购型号 | 产品状态 | 美金价格 | 数量 | 封装 | 包装形式 | 温度范围 | 材料声明 |
| F273-CEG-P | NRND | 22.465 | 1000 | PQFP 144 28x28x3.4 | Tray | -40 °C-120 °C | F273-CEG-P |
| F273-CEG-T | NRND | 19.968 | 1000 | LQFP 144 20x20x1.4 | Tray | -40 °C-120 °C | F273-CEG-T |
| F273-CEG-P-TR | NRND | 22.465 | 1000 | PQFP 144 28x28x3.4 | Tape And Reel | -40 °C-120 °C | F273-CEG-P-TR |
DATASHEET
| 描述 | 版本 | 大小 |
| ST10F273E : 16-bit MCU with 512 Kbyte Flash memory and 36 Kbyte RAM | 1 | 1870KB |
APPLICATION NOTES
| 描述 | 版本 | 大小 |
| AN2354: ST10 UART recommendations | 1 | 187KB |
| AN2340: ST10 RPD pin: functionality during Reset and Power Down mode | 1 | 110KB |
| AN2168: ST10F27x hardware development getting started | 2 | 170KB |
| AN2142: ST10F27X firmware development getting started with tasking ST10 toolchain | 1 | 618KB |
| AN2165: ST10F27x firmware development getting started with Keil µVision ST10 toolchain | 1 | 620KB |
| AN2143: Programming the ST10F27x embedded Flash using the ST10FLASHER tool | 1 | 259KB |
| AN2341: Programming ST10F27x/F25x CAN interrupt drivers | 1 | 179KB |
| AN2021: Porting an application from the ST10F269 to the ST10F273E/E | 2 | 688KB |
| AN2352: PLL jitter effects on C-CAN modules of the ST10F27x | 1 | 172KB |
| AN2244: EEPROM emulation with ST10F27x embedded Flash using the ST10F27x Flash library | 1 | 187KB |
| AN2353: Designing an application with the ST10F27x devices | 1 | 171KB |
ERRATA SHEETS
| 描述 | 版本 | 大小 |
| ES0107: ST10F271B/E, ST10F273E/E BAG silicon version | 1 | 100KB |
PROGRAMMING MANUALS
| 描述 | 版本 | 大小 |
| PM0036: ST10 Family programming manual | 7 | 2238KB |
USER MANUALS
| 描述 | 版本 | 大小 |
| UM0381: User Manual ST10F272 | 1 | 8086KB |
| UM0541: DCP monitor | 1 | 208KB |
