TLV320AIC23B 具有耳机放大器的低功耗立体声音频编解码器
|
TLV320AIC23B |
| SNR DAC / SNR ADC(Typ)(dB) |
100 / 90 |
| # DACs / # ADCs |
2 / 2 |
| # Inputs / # Outputs |
3 / 4 |
| Sampling Rate(Max)(kHz) |
96 |
| Resolution(Bits) |
24 |
| Digital Audio Interface |
L,R,I2S,DSP |
| Control Interface |
SPI,I2C |
| Analog Supply(V) |
2.7 - 3.6 |
| Digital Supply(V) |
1.42 - 3.6 |
| Pd(Typ)(mW) |
23 |
| Operating Temperature Range(°C) |
0 to 70,-40 to 85 |
| Pin/Package |
28TSSOP, 28VQFN, 80BGA MICROSTAR JUNIOR |
TLV320AIC23B 描述
The TLV320AIC23B is a high-performance stereo audio codec with highly integrated analog functionality. The analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) within the TLV320AIC23B use multibit sigma-delta technology with integrated oversampling digital interpolation filters. Data-transfer word lengths of 16, 20, 24, and 32 bits, with sample rates from 8 kHz to 96 kHz, are supported. The ADC sigma-delta modulator features third-order multibit architecture with up to 90-dBA signal-to-noise ratio (SNR) at audio sampling rates up to 96 kHz, enabling high-fidelity audio recording in a compact, power-saving design. The DAC sigma-delta modulator features a second-order multibit architecture with up to 100-dBA SNR at audio sampling rates up to 96 kHz, enabling high-quality digital audio-playback capability, while consuming less than 23 mW during playback only.
TLV320AIC23B 特性
- High-Performance Stereo Codec
- 90-dB SNR Multibit Sigma-Delta ADC (A-weighted at 48 kHz)
- 100-dB SNR Multibit Sigma-Delta DAC (A-weighted at 48 kHz)
- 1.42 V – 3.6 V Core Digital Supply: Compatible With TI C54x DSP Core Voltages
- 2.7 V – 3.6 V Buffer and Analog Supply: Compatible Both TI C54x DSP Buffer Voltages
- 8-kHz – 96-kHz Sampling-Frequency Support
- Software Control Via TI McBSP-Compatible Multiprotocol Serial Port
- 2-wire-Compatible and SPI-Compatible Serial-Port Protocols
- Glueless Interface to TI McBSPs
- Audio-Data Input/Output Via TI McBSP-Compatible Programmable Audio Interface
- I2S-Compatible Interface Requiring Only One McBSP for both ADC and DAC
- Standard I2S, MSB, or LSB Justified-Data Transfers
- 16/20/24/32-Bit Word Lengths
- Audio Master/Slave Timing Capability Optimized for TI DSPs (250/272 fs), USB mode
- Industry-Standard Master/Slave Support Provided Also (256/384 fs), Normal mode
- Glueless Interface to TI McBSPs
- Integrated Total Electret-Microphone Biasing and Buffering Solution
- Low-Noise MICBIAS pin at 3/4 AVDD for Biasing of Electret Capsules
- Integrated Buffer Amplifier With Tunable Fixed Gain of 1 to 5
- Additional Control-Register Selectable Buffer Gain of 0 dB or 20 dB
TLV320AIC23B 芯片订购指南
| 器件 |
状态 |
温度 (oC) |
价格（美元） |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| TLV320AIC23BPT |
ACTIVE |
-40 to 85 |
3.70 | 1ku |
LQFP (PT) | 48 |
250 |
320AIC22C
TLV |
| TLV320AIC23BPTR |
ACTIVE |
-40 to 85 |
3.70 | 1ku |
LQFP (PT) | 48 |
1000 |
320AIC22C
TLV |
TLV320AIC23B 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| TLV320AIC23BPT |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-4-260C-72HRS/Level-3-220C-168HRS |
|
TLV320AIC23BPT |
| TLV320AIC23BPTR |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-4-260C-72HRS/Level-3-220C-168HRS |
|
TLV320AIC23BPTR |
TLV320AIC23B 应用技术支持与电子电路设计开发资源下载
- TLV320AIC23B 数据资料 dataSheet 下载.PDF
- TI 德州仪器音频编解码器产品选型与价格参考 . xls
- 模数规格和性能特性术语表 (Rev. A) (PDF 1993 KB)
- 所选封装材料的热学和电学性质 (PDF 645 KB)
- 高速数据转换 (PDF 1967 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF
1305 KB)
- Analog-to-Digital Converter Grounding Practices Affect System
Performance (PDF 56 KB)
- Principles of Data Acquisition and Conversion (PDF 50 KB)
- Interleaving Analog-to-Digital Converters (PDF 64 KB)
- What
Designers Should Know About Data Converter Drift (PDF 95 KB)
- Giving Delta-Sigma Converters a Gain Boost with a Front End
Analog Gain Stage (PDF 70 KB)
- Programming Tricks for Higher Conversion Speeds Utilizing Delta
Sigma Converters (PDF 105 KB)
TLV320AIC23B 工具与软件
