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• Virtex 2.5 Volt Family (Table 1 of 2)
• Virtex 2.5 Volt Family (Table 2 of 2) 
• Virtex-E 1.8 Volt Family  (Table 1 of 4)
• Virtex-E 1.8 Volt Family  (Table 2 of 4)
• Virtex-E 1.8 Volt Family  (Table 3 of 4)
• Virtex-E 1.8 Volt Family  (Table 4 of 4)
• Virtex-E EM.PDF

Virtex 2.5 Volt Family (Table 1 of 2)

Feature/Product		XCV50	XCV100	XCV150	XCV200	XCV300
CLB Array (Row x Col.)		16 x 24	20 x 30	24 x 36	28 x 42	32 x 48
Logic Cells		1,728	2,700	3,888	5,292	6,912
System Gates		57,906	108,904	164,674	236,666	322,970
Max. Block RAM Bits		32,768	40,960	49,152	57,344	65,536
Max. Distributed RAM Bits		24,576	38,400	55,296	75,264	98,304
Delay Locked Loops (DLLs)		4	4	4	4	4
I/O Standards Supported		17	17	17	17	17
Speed Grades		4, 5, 6	4, 5, 6	4, 5, 6	4, 5, 6	4, 5, 6
Max. Avail. User I/O		180	180	260	284	316
CS144 (12mm x 12mm)	I/O	94	94
TQ144 (20mm x 20mm)	I/O	98	98
PQ240/HQ240 (32mm x 32mm)	I/O	166	166	166	166	166
BG256 (27mm x 27mm)	I/O	180	180	180	180
BG352 (35mm x 35mm)	I/O			260	260	260
BG432 (40mm x 40mm)	I/O					316
BG560 (42.5mm x 42.5mm)	I/O
FG256 (17mm x 17mm)	I/O	176	176	176	176
FG456 (23mm x 23mm)	I/O			260	284	312
FG676 (27mm x 27mm)	I/O
FG680 (40mm x 40mm)	I/O

Virtex 2.5 Volt Family (Table 2 of 2)

Feature/Product		XCV400	XCV600	XCV800	XCV1000
CLB Array (Row x Col.)		40 x 60	48 x 72	56 x 84	64 x 96
Logic Cells		10,800	15,552	21,168	27,648
System Gates		468,252	661,111	888,439	1,124,022
Max. Block RAM Bits		81,920	98,304	114,688	131,072
Max. Distributed RAM Bits		153,600	221,184	301,056	393,216
Delay Locked Loops (DLLs)		4	4	4	4
I/O Standards Supported		17	17	17	17
Speed Grades		4, 5, 6	4, 5, 6	4, 5, 6	4, 5, 6
Max. Avail. User I/O		404	512	512	512
CS144 (12mm x 12mm)	I/O
TQ144 (20mm x 20mm)	I/O
PQ240/HQ240 (32mm x 32mm)	I/O	166	166	166
BG256 (27mm x 27mm)	I/O
BG352 (35mm x 35mm)	I/O
BG432 (40mm x 40mm)	I/O	316	316	316
BG560 (42.5mm x 42.5mm)	I/O	404	404	404	404
FG256 (17mm x 17mm)	I/O
FG456 (23mm x 23mm)	I/O
FG676 (27mm x 27mm)	I/O	404	444	444
FG680 (40mm x 40mm)	I/O		512	512	512

  Virtex-E 1.8 Volt Family (Table 1 of 4)

Feature/Product			XCV50E	XCV100E	XCV200E
CLB Array (Row x Col.)			16 x 24	20 x 30	28 x 42
Logic Cells			1,728	2,700	5,292
System Gates			71,693	128,236	306,393
Max. Block RAM Bits			65,536	81,920	114,688
Max. Distributed RAM Bits			24,576	38,400	75,264
Delay Locked Loops (DLLs)			8	8	8
I/O Standards Supported			20	20	20
Speed Grades			6, 7, 8	6, 7, 8	6, 7, 8
Max. Avail. User I/O			176	196	284
Package	Differential Pairs
CS144 (12mm x 12mm)	30	I/O	94	94	94
PQ240/HQ240 (32mm x 32mm)	64	I/O	158	158	158
BG352 (35mm x 35mm)	87	I/O		196	260
BG432 (40mm x 40mm)	137	I/O
BG560 (42.5mm x 42.5mm)	183	I/O
FG256 (17mm x 17mm)	83	I/O	176	176	176
FG456 (23mm x 23mm)	119	I/O			284
FG676 (27mm x 27mm)	183	I/O
FG680 (40mm x 40mm)	247	I/O
FG860 (42.5mm x 42.55mm)	281	I/O
FG900 (31mm x 31mm)	260	I/O
FG1156 (35mm x 35mm)	344	I/O
CG1156 (35mm x 35mm)	344	I/O

  Virtex-E 1.8 Volt Family (Table 2 of 4)

Feature/Product			XCV300E	XCV400E	XCV600E
CLB Array (Row x Col.)			32 x 48	40 x 60	48 x 72
Logic Cells			6,912	10,800	15,552
System Gates			411,955	569,952	985,882
Max. Block RAM Bits			131,072	163,840	294,912
Max. Distributed RAM Bits			98,304	153,600	221,184
Delay Locked Loops (DLLs)			8	8	8
I/O Standards Supported			20	20	20
Speed Grades			6, 7, 8	6, 7, 8	6, 7, 8
Max. Avail. User I/O			316	404	512
Package	Differential Pairs
CS144 (12mm x 12mm)	30	I/O
PQ240/HQ240 (32mm x 32mm)	64	I/O	158	158	158
BG352 (35mm x 35mm)	87	I/O	260
BG432 (40mm x 40mm)	137	I/O	316	316	316
BG560 (42.5mm x 42.5mm)	183	I/O
FG256 (17mm x 17mm)	83	I/O	176
FG456 (23mm x 23mm)	119	I/O	312
FG676 (27mm x 27mm)	183	I/O		404	444
FG680 (40mm x 40mm)	247	I/O			512
FG860 (42.5mm x 42.55mm)	281	I/O
FG900 (31mm x 31mm)	260	I/O			512
FG1156 (35mm x 35mm)	344	I/O
CG1156 (35mm x 35mm)	344	I/O

  Virtex-E 1.8 Volt Family (Table 3 of 4)

Feature/Product			XCV1000E	XCV1600E	XCV2000E
CLB Array (Row x Col.)			64 x 96	72 x 108	80 x 120
Logic Cells			27,648	34,992	43,200
System Gates			1,569,178	2,188,742	2,541,952
Max. Block RAM Bits			393,216	589,824	655,360
Max. Distributed RAM Bits			393,216	497,664	614,400
Delay Locked Loops (DLLs)			8	8	8
I/O Standards Supported			20	20	20
Speed Grades			6, 7, 8	6, 7, 8	6, 7, 8
Max. Avail. User I/O			660	724	804
Package	Differential Pairs
CS144 (12mm x 12mm)	30	I/O
PQ240/HQ240 (32mm x 32mm)	64	I/O	158
BG352 (35mm x 35mm)	87	I/O
BG432 (40mm x 40mm)	137	I/O
BG560 (42.5mm x 42.5mm)	183	I/O	404	404	404
FG256 (17mm x 17mm)	83	I/O
FG456 (23mm x 23mm)	119	I/O
FG676 (27mm x 27mm)	183	I/O
FG680 (40mm x 40mm)	247	I/O	512	512	512
FG860 (42.5mm x 42.55mm)	281	I/O	660	660	660
FG900 (31mm x 31mm)	260	I/O	660	700
FG1156 (35mm x 35mm)	344	I/O	660	724	804
CG1156 (35mm x 35mm)	344	I/O

  Virtex-E 1.8 Volt Family (Table 4 of 4)

Feature/Product			XCV2600E	XCV3200E
CLB Array (Row x Col.)			92 x 138	104 x 156
Logic Cells			57,132	73,008
System Gates			3,263,755	4,074,387
Max. Block RAM Bits			749,568	851,968
Max. Distributed RAM Bits			812,544	1,038,336
Delay Locked Loops (DLLs)			8	8
I/O Standards Supported			20	20
Speed Grades			6,7,8	6,7,8
Max. Avail. User I/O			804	804
Package	Differential Pairs
CS144 (12mm x 12mm)	30	I/O
PQ240/HQ240 (32mm x 32mm)	64	I/O
BG352 (35mm x 35mm)	87	I/O
BG432 (40mm x 40mm)	137	I/O
BG560 (42.5mm x 42.5mm)	183	I/O
FG256 (17mm x 17mm)	83	I/O
FG456 (23mm x 23mm)	119	I/O
FG676 (27mm x 27mm)	183	I/O
FG680 (40mm x 40mm)	247	I/O
FG860 (42.5mm x 42.55mm)	281	I/O
FG900 (31mm x 31mm)	260	I/O
FG1156 (35mm x 35mm)	344	I/O	804	804
CG1156 (35mm x 35mm)	344	I/O