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产品概述
An interface between three SpaceWire links (according to the SpaceWire standard ECSS-E-50-12A specification) and a data processing node consisting of a CPU and a communication data memory. It is manufactured using the SEU hardened cell library from Atmel MG2RT CMOS-0.5µm radiation tolerant sea of gates technology. It provides hardware supported execution of the major parts of the interprocessor communication protocol. Target applications are heterogeneous, multi-processor systems supported by scalable interfaces including the little/big endian byte swapping.
关键参数
| Parameter | Value |
| Temp. Range (deg C): | -55 to 125 |
| Operating Voltage (Vcc): | 3.0 to 3.6 or 4.5 to 5.5 |
