ATF750LVC
| Key | Value |
|---|
| Operating Voltage (Vcc): | 3.0/5.5 |
|---|
| I/O Pins: | 24/28 |
|---|
| Commercial tpd: | 15 |
|---|
| Macrocells: | 10 |
|---|
| Power Options: | STANDARD |
|---|
| Registers: | 20 |
|---|
| Usable Gates: | 500 |
|---|
A high-performance CMOS (electrically-erasable) complex programmable logic device (CPLD) that uses Atmel's proven electrically-erasable technology. The Atmel® "750" architecture is twice as powerful as most other 24-pin programmable logic devices. Increased product terms, sum terms, flip-flops and output logic configurations translate into more usable gates. High-speed logic and uniform, predictable delays guarantee fast in-system performance.
Ordering Code 订购信息| 订购码 | 封装 | 操作范围 | 载体类型 |
|---|
| ATF750LVC-15SU | | Industrial (A) (-40°C to 85°C) | |
| ATF750LVC-15XU | TSSOP 24X 24 | Industrial (A) (-40°C to 85°C) | |
| ATF750LVC-15JU | PLCC 28J 28 | Industrial (A) (-40°C to 85°C) | |
| ATF750LVC-15PU | PDIP 24P3 24 | Industrial (A) (-40°C to 85°C) | |
DataSheet 数据手册
Application Note
- Atmel PLD Architectures Simplify Timing Calculations(4 页数, 更新时间: 08/1999)
- Atmel PLD Design Guidelines(12 页数, 更新时间: 09/2000)
- Programming of Atmel PLDs(文件大小: 184KB, 4 页数, 修订版 A, 更新时间: 08/2015)
- Saving Power with Atmel PLDs(7 页数, 更新时间: 09/2000)
- Selecting Decoupling Capacitors for Atmel PLDs(4 页数, 更新时间: 09/1999)
- Tips on Using Test Vectors for Atmel PLDs(20 页数, 更新时间: 09/1999)
- Using a PLD as a System Controller in an I/O Bus Based System(7 页数, 更新时间: 09/1999)
- Using Programmable Logic Devices(4 页数, 更新时间: 09/1999)
- Using the ATV750, ATV750B, and ATF750C(文件大小: 417Kb, 17 页数, 修订版 D, 更新时间: 07/2013)
- Using the Programmable Polarity Control(7 页数, 更新时间: 08/1999)
White Paper
