74AUP2G125:双门

Part NumberData SheetSPICE ModelNumber of GatesFamilyVCC Min (V)VCC Max (V)tpd max @ (1.5V) (ns)tpd max @ (1.8V) (ns)tpd max @ (2.5V) (ns)tpd max @ (3.3V) (ns)tpd max @ (5.0V) (ns)Input/ Output Current
74AUP2G12574AUP2G125.pdf-2AUP0.83.610.88.46.35.8-4
Description

The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications. The 74AUP2G125 is a dual 3-State Buffer. Each buffer has an individual output enable pin while asserted HIGH will place the output in a high impedance state. The device is designed for operation over a power supply range of 0.8 V to 3.6 V. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow when the device is powered down.

Application
  • Suited for battery and low power needs
  • Wide array of products such as:
  • PCs, networking, notebooks, netbooks, PDAs
  • Tablet Computers, E-readers
  • Computer peripherals, hard drives, CD/DVD ROM
  • TV, DVD, DVR, set top box
  • Cell Phones, Personal Navigation / GPS
  • MP3 players ,Cameras, Video Recorders
订购型号
  • 74AUP2G125RA3-7
X2-DFN1210-8
74AUP2G125.pdf 74AUP2G125