74ALVC16244DL: 2.5 V / 3.3 V 16位缓冲器/线路驱动器(3态)

74ALVC16244;74ALVCH16244是带3态输出的16位非反相缓冲器/线路驱动器。该器件可用作四个4位缓冲器、两个8位缓冲器或一个16位缓冲器。3态输出通过输出使能输入1OE、2OE、3OE和4OE控制。nOE上的高电平使输出呈高阻抗关断状态。

74ALVCH16244具有有源总线保持电路,提供该电路是为了使闲置或浮动数据输入保持在有效逻辑电平。该器件因此特性而无需外部上拉或下拉电阻。

74ALVC16244具有5 V容压输入。

74ALVC16244DL: 产品结构框图
Outline 3d SOT370-1
数据手册 (1)
名称/描述Modified Date
2.5 V / 3.3 V 16-bit buffer/line driver (3-state) (REV 3.0) PDF (87.0 kB) 74ALVC_ALVCH16244 [English]14 Mar 2014
应用说明 (5)
名称/描述Modified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]13 Mar 2013
Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English]13 Mar 2013
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English]13 Mar 2013
Interfacing 3 Volt and 5 Volt Applications (REV 1.0) PDF (63.0 kB) AN240 [English]15 Sep 1995
手册 (2)
名称/描述Modified Date
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English]16 Feb 2015
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English]20 May 2014
选型工具指南 (2)
名称/描述Modified Date
ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English]19 Nov 2015
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English]08 Jan 2015
封装信息 (1)
名称/描述Modified Date
plastic shrink small outline package; 48 leads; body width 7.5 mm (REV 1.0) PDF (482.0 kB) SOT370-1 [English]08 Feb 2016
包装 (1)
名称/描述Modified Date
Standard product orientation 12NC ending 118 (REV 2.0) PDF (87.0 kB) SOT370-1_118 [English]19 Apr 2013
支持信息 (2)
名称/描述Modified Date
Footprint for reflow soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-REFLOW [English]08 Oct 2009
Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English]08 Oct 2009
IBIS
订购信息
型号状态Family功能VCC (V)Logic switching levels说明Package versionOutput drive capability (mA)fmax (MHz)No of bitstpd (ns)Power dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package nameNo of pins
74ALVC16244DLActiveALVCBuffers/inverters/drivers1.2 - 3.6LVTTL16-bit buffer/line driver (3-state)SOT370-1+/- 24150161.9low-40~858825.0SSOP4848
封装环保信息
产品编号封装说明Outline Version回流/波峰焊接包装产品状态部件编号订购码 (12NC)Marking化学成分RoHS / 无铅 / RHF无铅转换日期EFRIFR(FIT)MTBF(小时)MSLMSL LF
74ALVC16244DLSOT370-1SSOP-TSSOP-VSO-REFLOW SSOP-TSSOP-VSO-WAVE
SSOP-TSSOP-VSO-REFLOW SSOP-TSSOP-VSO-WAVE
Reel 13" Q1/T1Active74ALVC16244DL,118 (9351 877 80118)ALVC1624474ALVC16244DLweek 13, 2005123.83.872.58E811
Bulk PackActive74ALVC16244DL,112 (9351 877 80112)ALVC1624474ALVC16244DLweek 13, 2005123.83.872.58E811
2.5 V / 3.3 V 16-bit buffer/line driver (3-state) 74ALVCH16244DL
Sorting through the low voltage logic maze 74LVC_H_245A_Q100
Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
Ground and VCC Bounce of High-Speed Integrated Circuits 74ALVC164245DGG-Q100
Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100
Interfacing 3 Volt and 5 Volt Applications 74LVC377PW
電圧レベルシフタ 74AVC16245DGG-Q100
Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
ロジック製品セレクションガイド... 74LVC_H_245A_Q100
Logic selection guide 2016 74LVC_H_245A_Q100
alvc16244 IBIS model 74ALVC16244DL
plastic shrink small outline package; 48 leads; body width 7.5 mm gtl2000dl
Footprint for reflow soldering 74HC_T_595_Q100
SSOP-TSSOP-VSO-WAVE LPC1114FDH28
Standard product orientation 12NC ending 118 gtl2000dl
74ALVC_H_16244
74LVT162245B