74AUP3G34GT: Low-power triple buffer

The 74AUP3G34 is a triple buffer.

Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.

74AUP3G34GT: 产品结构框图
Outline 3d SOT833-1
数据手册 (1)
名称/描述Modified Date
Low-power triple buffer (REV 2.0) PDF (215.0 kB) 74AUP3G34 [English]12 Oct 2016
手册 (1)
名称/描述Modified Date
NXP® ultra-low-power CMOS logic 74AUP1G/2G/3Gxxx: Advanced, ultra-low-power CMOS logic (REV 1.0) PDF (1.4 MB) 75017458 [English]13 Oct 2014
选型工具指南 (2)
名称/描述Modified Date
ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English]19 Nov 2015
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English]08 Jan 2015
封装信息 (1)
名称/描述Modified Date
plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm (REV 1.0) PDF (201.0 kB) SOT833-1 [English]08 Feb 2016
包装 (1)
名称/描述Modified Date
Standard product orientation 12NC ending 115 (REV 3.0) PDF (88.0 kB) SOT833-1_115 [English]05 Apr 2013
支持信息 (1)
名称/描述Modified Date
MAR_SOT833 Topmark (REV 1.0) PDF (75.0 kB) MAR_SOT833 [English]03 Jun 2013
IBIS
订购信息
型号状态Family功能VCC (V)Logic switching levels说明Output drive capability (mA)Package versionfmax (MHz)No of bitsPower dissipation considerationstpd (ns)Tamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package nameNo of pins
74AUP3G34GTActiveAUPtriple buffer1.1 - 3.6CMOStriple buffer+/- 1.9SOT833-1703ultra low3.9-40~1253276.1157XSON88
封装环保信息
产品编号封装说明Outline Version回流/波峰焊接包装产品状态部件编号订购码 (12NC)Marking化学成分RoHS / 无铅 / RHF无铅转换日期MSLMSL LF
74AUP3G34GTSOT833-1Reel 7" Q1/T1Active74AUP3G34GTX (9352 806 95115)Standard Marking74AUP3G34GTAlways Pb-free11
Low-power triple buffer 74AUP3G34GT
NXP® ultra-low-power CMOS logic 74AUP1G/2G/3Gxxx: Advanced, ultra-low-power CMOS logic 74AUP1G86GW-Q100
ロジック製品セレクションガイド... 74LVC_H_245A_Q100
Logic selection guide 2016 74LVC_H_245A_Q100
MAR_SOT833 Topmark NCX2222
74AUP3G34 IBIS Model 74AUP3G34GT
plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm NCX2222
Standard product orientation 12NC ending 115 NCX2222
74AVCM162836DGG
XC7WT14