74LVC125ABQ: 四路缓冲器/线路驱动器,带5 V容压输入/输出;3态

74LVC125A由四个带3态输出(nY)的非反相缓冲器/线路驱动器组成,由输出使能输入(nOE)进行控制。nOE处的高电平使输出呈高阻抗关断状态。

输入可通过3.3 V或5 V器件进行驱动。禁用时,可以向输出施加高达5.5 V的电压。

74LVC125ABQ: 产品结构框图
sot762-1_3d
数据手册 (1)
名称/描述Modified Date
Quad buffer/line driver with 5 V tolerant input/outputs; 3-state (REV 7.0) PDF (119.0 kB) 74LVC125A [English]11 Apr 2013
应用说明 (5)
名称/描述Modified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]13 Mar 2013
Pin FMEA for LVC family (REV 1.0) PDF (44.0 kB) AN11009 [English]04 Feb 2011
Power considerations when using CMOS and BiCMOS logic devices (REV 1.0) PDF (100.0 kB) AN263 [English]05 Feb 2002
Interfacing 3 Volt and 5 Volt Applications (REV 1.0) PDF (63.0 kB) AN240 [English]15 Sep 1995
封装信息 (1)
名称/描述Modified Date
plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 x 3 x... (REV 1.0) PDF (187.0 kB) SOT762-1 [English]08 Feb 2016
包装 (1)
名称/描述Modified Date
Standard product orientation 12NC ending 115 (REV 3.0) PDF (108.0 kB) SOT762-1_115 [English]09 Apr 2013
IBIS
SPICE
订购信息
型号状态Family功能VCC (V)说明Logic switching levelsOutput drive capability (mA)Package versionfmax (MHz)No of bitsPower dissipation considerationstpd (ns)Tamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package nameNo of pins
74LVC125ABQActiveLVCBuffers/inverters/drivers1.2 - 3.6quad buffer/line driver (3-state)CMOS/LVTTL+/- 24SOT762-11754low2.4-40~12510721.975DHVQFN1414
封装环保信息
产品编号封装说明Outline Version回流/波峰焊接包装产品状态部件编号订购码 (12NC)Marking化学成分RoHS / 无铅 / RHF无铅转换日期EFRIFR(FIT)MTBF(小时)MSLMSL LF
74LVC125ABQSOT762-1Reel 7" Q1/T1Active74LVC125ABQ,115 (9352 733 44115)VC12574LVC125ABQAlways Pb-free123.83.872.58E811
Quad buffer/line driver with 5 V tolerant input/outputs; 3-state 74LVC125APW
Sorting through the low voltage logic maze 74LVC_H_245A_Q100
Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
Pin FMEA for LVC family 74LVC1G123_Q100
Power considerations when using CMOS and BiCMOS logic devices 74AHCT244PW
Interfacing 3 Volt and 5 Volt Applications 74LVC377PW
lvc125a IBIS model 74LVC125APW
lvc Spice model 74LVC3G17GT
plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 x 3 x... 74LV164_Q100
Standard product orientation 12NC ending 115 74LV164_Q100
74LVT_H_125
74LV164