74LVTH16245BDL: 3.3 V 16位收发器;3态

74LVT16245B;74LVTH16245B是高性能BiCMOS产品,设计用于3.3 V的VCC操作。

该器件是16位收发器,在发送和接收方向上都具有非反相3态总线兼容输出。控制功能实施可最大限度减少外部定时要求。该器件具有一个可实现轻松级联的输出使能(nOE)输入和一个可实现直接控制的直接 (nDIR)输入。

74LVTH16245BDL: 产品结构框图
74LVTH16245BDL: 应用结构框图
74LVTH16245BDL: 应用结构框图
74LVTH16245BDL: 应用结构框图
74LVTH16245BDL: 应用结构框图
74LVTH16245BDL: 应用结构框图
Outline 3d SOT370-1
数据手册 (1)
名称/描述Modified Date
3.3 V 16-bit transceiver; 3-state (REV 10.0) PDF (255.0 kB) 74LVT_LVTH16245B [English]01 Mar 2012
应用说明 (7)
名称/描述Modified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]13 Mar 2013
Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English]13 Mar 2013
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English]13 Mar 2013
Test Fixtures for High Speed Logic (REV 1.0) PDF (341.0 kB) AN203 [English]02 Apr 1998
Transmission Lines and Terminations with Philips Advanced Logic Families (REV 1.0) PDF (217.0 kB) AN246 [English]01 Feb 1998
LVT (Low Voltage Technology) and ALVT (Advanced LVT) (REV 1.0) PDF (133.0 kB) AN243 [English]01 Jan 1998
选型工具指南 (2)
名称/描述Modified Date
ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English]19 Nov 2015
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English]08 Jan 2015
封装信息 (1)
名称/描述Modified Date
plastic shrink small outline package; 48 leads; body width 7.5 mm (REV 1.0) PDF (482.0 kB) SOT370-1 [English]08 Feb 2016
包装 (1)
名称/描述Modified Date
Standard product orientation 12NC ending 118 (REV 2.0) PDF (87.0 kB) SOT370-1_118 [English]19 Apr 2013
支持信息 (2)
名称/描述Modified Date
Footprint for reflow soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-REFLOW [English]08 Oct 2009
Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English]08 Oct 2009
IBIS
订购信息
型号状态FamilyVCC (V)功能Logic switching levels说明Package versionOutput drive capabilitytpd (ns)No of bitsfmax (MHz)Power dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package nameNo of pins
74LVTH16245BDLActiveLVT2.7 - 3.6TransceiversTTL16-bit transceiver with bus hold (3-state)SOT370-1-32/+641.916150medium8825.0SSOP4848
封装环保信息
产品编号封装说明Outline Version回流/波峰焊接包装产品状态部件编号订购码 (12NC)Marking化学成分RoHS / 无铅 / RHF无铅转换日期EFRIFR(FIT)MTBF(小时)MSLMSL LF
74LVTH16245BDLSOT370-1SSOP-TSSOP-VSO-REFLOW SSOP-TSSOP-VSO-WAVE
SSOP-TSSOP-VSO-REFLOW SSOP-TSSOP-VSO-WAVE
Reel 13" Q1/T1Active74LVTH16245BDL,118 (9352 817 52118)LVTH16245B74LVTH16245BDLAlways Pb-free70.81.337.52E811
Bulk PackActive74LVTH16245BDL,112 (9352 817 52112)LVTH16245B74LVTH16245BDLAlways Pb-free70.81.337.52E811
3.3 V 16-bit transceiver; 3-state 74LVTH16245BDL
Sorting through the low voltage logic maze 74LVC_H_245A_Q100
Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
Ground and VCC Bounce of High-Speed Integrated Circuits 74ALVC164245DGG-Q100
Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100
Test Fixtures for High Speed Logic 74ABTH162245ADL
Transmission Lines and Terminations with Philips Advanced Logic Families 74LVTN16245BDGG
LVT (Low Voltage Technology) and ALVT (Advanced LVT) 74LVTN16245BDGG
ロジック製品セレクションガイド... 74LVC_H_245A_Q100
Logic selection guide 2016 74LVC_H_245A_Q100
lvth16245b IBIS model 74LVTH16245BDL
plastic shrink small outline package; 48 leads; body width 7.5 mm gtl2000dl
Footprint for reflow soldering 74HC_T_595_Q100
SSOP-TSSOP-VSO-WAVE LPC1114FDH28
Standard product orientation 12NC ending 118 gtl2000dl
74LVT_H_16245B
74LVTN16245B
74LVT_H_16245B
74LVT_H_16245B
74AVCM162836DGG
74LVT162245B