UPD70F3427GD(A)-LML-AX

DataSheet 数据书册
下载文件
UPD70F3427GD(A)-LML-AX.pdf
Basic Information
Product StatusEOL
FamilyV850
SeriesV850E/Dx
GroupV850E/Dx3

Memory
Program memory1024 KB Flash memory
RAM60 KB

CPU (Bit, Clock, DMA, External Bus etc)
CPUV850E1 (32-bit)
Max. Frequency64 MHz
Sub-Clock (32.768 kHz)YES
On-chip Oscillator Freq.64, 32, 24 MHz, Low Speed 240 kHz
Power-On ResetYES
Low Voltage DetectionYES
DMA RemarksDMAC x 4 ch
External Address/Data BusYES
External Interrupt Pins8
I/O Ports101

Timers
16-bit Timers17 ch
Watchdog Timers1 ch
PWM Output16
3-Phase PWM Output FunctionYES

Analog
A/D Converters10-bit x 16 ch

Interfaces
CAN3 ch
CSIs2 ch
SPIs2 ch
UARTs2 ch
I2Cs2 ch
LIN2 ch

Operating Conditions
Operating Voltage3.5 to 5.5 V
Operating Temperature-40 to 85 ℃ (Ambient Temperature)

Remarks
RemarksAutomotive

Package
Pins208
Terminal pitch (mm)0.5 mm
Package TypeFQFP
Dimensions (mm)28x28 mm2
Drawing Linkp208gd-50-lml
Mount padfig0008e
Mounting height (mm)[MAX]3.8 mm
Mass (g) [TYP,]5 g
Renesas codePRQP0208KG-B (old: P208GD-50-LML )
JEITA codeP-FQFP208-28x28-0.50
Terminal material - BaseCu alloy
Terminal material - SurfaceSn-Bi or Ni/Pd/Au
订购型号
型号状态产品长期供应计划预算价格(1000片) 包装明星产品RoHS
UPD70F3427GD(A)-LML-AXEOL--| MOQ:| WRAP_SPEC:-| OTHER_ENV:false无铅
V850E/Dx3 - DJ3/DL3 User Manual Hardware Jun.27.12;Rev.7.01;15.02 Mbytes