AD9650 16-Bit, 25 MSPS/65 MSPS/80 MSPS/105 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC)

On-chip dither option for improved SFDR performance with low power analog input. Proprietary differential input that maintains excellent SNR performance for input frequencies up to 300 MHz. Operation from a single 1.8 V supply and a separate digital output driver supply accommodating 1.8 V CMOS or LVDS outputs. Standard serial port interface (SPI) that supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), enabling the clock DCS, power-down, and test modes. Pin compatible with the AD9268 and other dual families, AD9269, AD9251, AD9231, and AD9204. This allows a simple migration across resolutions and bandwidth.

The AD9650 is a dual, 16-bit, 25 MSPS/65 MSPS/80 MSPS/ 105 MSPS analog-to-digital converter (ADC) designed for digitizing high frequency, wide dynamic range signals with input frequencies of up to 300 MHz.

The dual ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth, differential sample-and-hold analog input amplifiers, and shared integrated voltage reference, which eases design considerations. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance.

The ADC output data can be routed directly to the two external 16-bit output ports or multiplexed on a single 16-bit bus. These outputs can be set to either 1.8 V CMOS or LVDS.

Flexible power-down options allow significant power savings, when desired.

Programming for setup and control is accomplished using a 3-wire SPI-compatible serial interface.

The AD9650 is available in a 64-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C.

Product Highlights

Applications
  • Industrial instrumentation
  • X-Ray, MRI, and ultrasound equipment
  • High speed pulse acquisition
  • Chemical and spectrum analysis
  • Direct conversion receivers
  • Multimode digital receivers
  • Smart antenna systems
  • General-purpose software radios
Features and Benefits
  • 1.8 V analog supply operation
  • 1.8 V CMOS or LVDS output supply
  • SNR
    • 82 dBFS at 30 MHz input and 105 MSPS data rate
    • 83 dBFS at 9.7 MHz input and 25 MSPS data rate
  • 82 dBFS at 30 MHz input and 105 MSPS data rate
  • 83 dBFS at 9.7 MHz input and 25 MSPS data rate
  • SFDR
    • 90 dBc at 30 MHz input and 105 MSPS data rate
    • 95 dBc at 9.7 MHz input and 25 MSPS data rate
  • 90 dBc at 30 MHz input and 105 MSPS data rate
  • 95 dBc at 9.7 MHz input and 25 MSPS data rate
  • Low power
    • 328 mW per channel at 105 MSPS
    • 119 mW per channel at 25 MSPS
  • 328 mW per channel at 105 MSPS
  • 119 mW per channel at 25 MSPS
  • Integer 1-to-8 input clock divider
  • See data sheet for additional features
  • Download AD9650-EP data sheet (pdf)
  • Analog to Digital Converters
    IBIS Models
    MathWorks®
    Data Sheets
    Documentnote
    AD9650: 16-Bit, 25 MSPS/65 MSPS/80 MSPS/105 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC) Data Sheet (Rev. A)PDF 3037 kB
    AD9650-EP: Enhanced Product Data Sheet (Rev. 0)PDF 245.97 K
    Application Notes
    Documentnote
    AN-878: High Speed ADC SPI Control Software (Rev. A)PDF 585 kB
    AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs (Rev. 0)PDF 203 kB
    AN-742: Frequency Domain Response of Switched-Capacitor ADCs (Rev. B)PDF 401 kB
    AN-586: LVDS Outputs for High Speed A/D Converters (Rev. 0)PDF 207 kB
    AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0)PDF 392 kB
    AN-807: Multicarrier WCDMA Feasibility (Rev. 0)PDF 969 kB
    AN-808: Multicarrier CDMA2000 Feasibility (Rev. 0)PDF 1535 kB
    AN-812: MicroController-Based Serial Port Interface (SPI) Boot Circuit (Rev. 0)
    Software Download (zip, 21,702,560 bytes)
    PDF 441 kB
    User Guides
    Documentnote
    UG-003: Evaluating the AD9650/AD9268/AD9258/AD9251/AD9231/AD9204 Analog-to-Digital ConvertersPDF 2699 kB
    Order Information
    Part NumberPackagePacking QtyTemp RangePrice 100-499Price 1000+RoHS
    AD9650BCPZ-105 Production64 ld LFCSP (9x9mm, 7.5mm exposed pad) OTH 260-40 to 85C159135.15Y
    AD9650BCPZ-25 Production64 ld LFCSP (9x9mm, 7.5mm exposed pad) OTH 260-40 to 85C62.3553Y
    AD9650BCPZ-65 Production64 ld LFCSP (9x9mm, 7.5mm exposed pad) OTH 260-40 to 85C115.998.52Y
    AD9650BCPZ-80 Production64 ld LFCSP (9x9mm, 7.5mm exposed pad) OTH 260-40 to 85C135.2114.92Y
    AD9650BCPZRL7-105 Production64 ld LFCSP (9x9mm, 7.5mm exposed pad) REEL 750-40 to 85C159135.15Y
    AD9650BCPZRL7-25 Production64 ld LFCSP (9x9mm, 7.5mm exposed pad) REEL 750-40 to 85C62.3553Y
    AD9650BCPZRL7-65 Production64 ld LFCSP (9x9mm, 7.5mm exposed pad) REEL 750-40 to 85C115.998.52Y
    AD9650BCPZRL7-80 Production64 ld LFCSP (9x9mm, 7.5mm exposed pad) REEL 750-40 to 85C135.2114.92Y
    AD9650USVZ-105EP ProductionTQFP 1.0 MM W/ THERMAL PADOTH 119-55 to 85C235.3200Y
    AD9650USVZR7-105EP ProductionTQFP 1.0 MM W/ THERMAL PADREEL 1000-55 to 85C235.3200Y
    Evaluation Boards
    Part NumberDescriptionPriceRoHS
    AD9650-105EBZEvaluation Board200Y
    AD9650-25EBZEvaluation Board200Y
    AD9650-65EBZEvaluation Board200Y
    AD9650-80EBZEvaluation Board200Y
    Reference Materials
    AD9650: 16-Bit, 25 MSPS/65 MSPS/80 MSPS/105 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC) Data Sheet (Rev. A) ad9650
    AD9650-EP: Enhanced Product Data Sheet (Rev. 0) ad9650
    AD9650 IBIS Model ad9650
    AN-878: High Speed ADC SPI Control Software (Rev. A) ad6655
    AN-808: CDMA2000多载波系统可行性研究 (Rev. 0) adl5330
    AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs (Rev. 0) ad6655
    AN-742: Frequency Domain Response of Switched-Capacitor ADCs (Rev. B) ad7476
    AN-586: LVDS Outputs for High Speed A/D Converters (Rev. 0) ad6642
    AN-1142: 高速ADC PCB布局布线技巧 (Rev. 0) ad6655
    AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0) ad6655
    AN-878: 高速ADC SPI控制软件[中文版] (Rev. A) ad6655
    AN-807: 多载波WCDMA的可行性 (Rev. 0) adf4106
    AN-807: Multicarrier WCDMA Feasibility (Rev. 0) ad6655
    AN-808: Multicarrier CDMA2000 Feasibility (Rev. 0) ad9863
    AN-827: 放大器与开关电容ADC接口的匹配方法[中文版] (Rev. 0) ad8351
    AN-586: 高速模数转换器的LVDS数据输出[中文版] (Rev. 0) ad6642
    AN-812: 基于微控制器的串行端口接口(SPI®)启动电路 (Rev. 0) adg3304
    AN-812: MicroController-Based Serial Port Interface (SPI) Boot Circuit (Rev. 0) ad6655
    Software Download (zip, 21,702,560 bytes) ad6655
    UG-003: Evaluating the AD9650/AD9268/AD9258/AD9251/AD9231/AD9204 Analog-to-Digital Converters ad9204
    MS-2677:JESD204B 子类 ( 第二部分 ) :子类 1 与子类 2 系统考虑因素 ad9625
    MS-2210:高速ADC的电源设计 ad9861