AD9856 CMOS 200 MHz Quadrature Digital Upconverter

The AD9856 integrates a high-speed direct-digital synthesizer (DDS), a high-performance, high-speed 12-bit Digital-to-Analog converter (DAC), clock multiplier circuitry, digital filters, and other DSP functions onto a single chip, to form a complete quadrature digital upconverter device. The AD9856 is primarily intended to function as a universal upstream and downstream I/Q modulator for interactive HFC cable network applications, where cost, size, power dissipation, and dynamic performance are critical attributes.

Features and Benefits
  • Universal Low Cost Modulator Solution for Communications Applications
  • DC to 80 MHz Output Bandwidth
  • Integrated 12-Bit D/A Converter
  • Programmable Sample Rate Interpolation Filter
  • Programmable Reference Clock Multiplier
  • Internal SIN(x)/x Compensation Filter
  • >52 dB SFDR @ 40 MHz AOUT
  • +3 V Single Supply Operation
  • >48 dB SFDR @ 70 MHz AOUT
  • >80 dB Narrowband SFDR @ 70 MHz AOUT
  • Space-Saving Surface-Mount Packaging
  • Bidirectional Control Bus Interface
    • RF & Microwave
    Data Sheets
    Documentnote
    AD9856: CMOS 200 MHz Quadrature Digital Upconverter Data Sheet (Rev. C)PDF 959 kB
    Application Notes
    Documentnote
    AN-1389: Recommended Rework Procedure for the Lead Frame Chip Scale Package (LFCSP) (Rev. 0)PDF 133.7 K
    AN-837: DDS-Based Clock Jitter Performance vs. DAC Reconstruction Filter Performance (Rev. 0)PDF 313 kB
    AN-237: Choosing DACs for Direct Digital SynthesisPDF 1156 kB
    AN-823: Direct Digital Synthesizers in Clocking Applications Time (Rev. 0)PDF 115 kB
    AN-924: Digital Quadrature Modulator Gain (Rev. A)PDF 105 kB
    AN-922: Digital Pulse-Shaping Filter Basics (Rev. 0)PDF 1582 kB
    AN-772: A Design and Manufacturing Guide for the Lead Frame Chip Scale Package (LFCSP) (Rev. 0)PDF 439 kB
    AN-851: A WiMax Double Downconversion IF Sampling Receiver Design (Rev. 0)PDF 262 kB
    AN-847: Measuring a Grounded Impedance Profile Using the AD5933 (Rev. A)PDF 294 kB
    Product Highlight
    Documentnote
    Introducing Digital Up/Down Converters: VersaCOMM™ Reconfigurable Digital ConvertersPDF 63 kB
    Technical Books
    Documentnote
    Frequently Asked Questions
    Documentnote
    Order Information
    Part NumberPackagePacking QtyTemp RangePrice 100-499Price 1000+RoHS
    AD9856AST Obsolete48 ld LQFPOTH 25000N
    AD9856ASTZ Production48 ld LQFPOTH 250-40 to 85C38.5832.79Y
    Reference Materials
    AD9856: CMOS 200 MHz Quadrature Digital Upconverter Data Sheet (Rev. C) ad9856
    AN-1389: 引线框芯片级封装(LFCSP)的建议返修程序 (Rev. 0) ad9540
    AN-1389: Recommended Rework Procedure for the Lead Frame Chip Scale Package (LFCSP) (Rev. 0) ad9856
    AN-837: DDS-Based Clock Jitter Performance vs. DAC Reconstruction Filter Performance (Rev. 0) ad9856
    AN-237: Choosing DACs for Direct Digital Synthesis ad9856
    AN-823: Direct Digital Synthesizers in Clocking Applications Time (Rev. 0) ad9856
    AN-924: Digital Quadrature Modulator Gain (Rev. A) ad9856
    AN-772: 引脚架构芯片级封装（LFCSP）设计与制造指南 (Rev. 0) ad9540
    AN-237: 放大器直接数字频率合成的DAC选型器应用漫谈 (Rev. 0) ad9540
    AN-924: 数字正交调制器增益 (Rev. A) ad9856
    AN-922: 数字脉冲整形滤波器基础知识 (Rev. 0) ad9856
    AN-922: Digital Pulse-Shaping Filter Basics (Rev. 0) ad9856
    AN-837: 基于DDS的时钟抖动性能与DAC重构滤波器性能的关系[中文版] (Rev. 0) ad9540
    AN-772: A Design and Manufacturing Guide for the Lead Frame Chip Scale Package (LFCSP) (Rev. 0) ad9856
    AN-823: 时钟应用中的直接数字频率合成器[中文版] (Rev. 0) ad9540
    AN-851: 一种WiMax双下变频IF采样接收机设计方案[中文版] (Rev. 0) ad9540
    AN-851: A WiMax Double Downconversion IF Sampling Receiver Design (Rev. 0) ad9856
    AN-847: 用AD5933测量接地阻抗特性 (Rev. A) ad9856
    AN-847: Measuring a Grounded Impedance Profile Using the AD5933 (Rev. A) ad9856
    Introducing Digital Up/Down Converters: VersaCOMM™ Reconfigurable Digital Converters ad9856
    Basics of Designing a Digital Radio Receiver (Radio 101) ad9856
    Digital Up/Down Converters: VersaCOMM™ White Paper ad9856
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