• 简体中文
• English

ADF4153 Fractional-N Frequency Synthesizer

The ADF4153 is a fractional-N frequency synthesizer that implements local oscillators in the upconversion and downconversion sections of wireless receivers and transmitters. It consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider. There is a Σ-Δ based fractional interpolator to allow programmable fractional-N division. The INT, FRAC, and MOD registers define an overall N divider (N = (INT + (FRAC/MOD))). In addition, the 4-bit reference counter (R counter) allows selectable REFIN frequencies at the PFD input. A complete phase- locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and a voltage controlled oscillator (VCO).

A simple 3-wire interface controls all on-chip registers. The device operates with a power supply ranging from 2.7 V to 3.3 V and can be powered down when not in use.

Applications

• CATV equipment
• Base stations for mobile radio (GSM, PCS, DCS, WiMAX, SuperCell 3G, CDMA, W-CDMA)
• Wireless handsets (GSM, PCS, DCS, CDMA, W-CDMA)
• Wireless LANs, PMR
• Communications test equipment

Data Sheets

Application Notes

User Guides

Frequently Asked Questions

Order Information

Evaluation Boards

Reference Materials

• Product Selection Guide：RF Source Booklet
• Circuit Notes：CN-0232: Minimizing Spurious Outputs Using a Synthesizer with an Integrated VCO
• Technical Articles：Phase Locked Loops for High-Frequency Receivers and Transmitters – Part 1
• Technical Articles：Phase-Locked Loops for High-Frequency Receivers and Transmitters - Part 2
• Technical Articles：Phase Locked Loops for High-Frequency Receivers and Transmitters – Part 3