74AUP1G17:Single Gate

Part NumberData SheetSPICE ModelNumber of GatesFamilyVCC Min (V)VCC Max (V)tpd max @ (1.5V) (ns)tpd max @ (1.8V) (ns)tpd max @ (2.5V) (ns)tpd max @ (3.3V) (ns)tpd max @ (5.0V) (ns)Output Current
74AUP1G1774AUP1G17.pdf-1AUP0.83.68.67.15.64.9-4
Description

The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications. The AUP1G17 is a single 1-input Schmitt-trigger buffer gate with a push-pull output designed for operation over a power supply range of .8V to 3.6V. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow when the device is powered down.

Application
  • Suited for battery and low power needs
  • Wide array of products such as:
Features
  • Advanced Ultra Low Power (AUP) CMOS
  • Supply Voltage Range from 0.8V to 3.6V
  • ±4mA Output Drive at 3.0V
  • Low Static Power Consumption
Ordering Information
  • 74AUP1G17FS3-7
  • 74AUP1G17FW5-7
  • 74AUP1G17FZ4-7
  • 74AUP1G17SE-7
SOT353
X2-DFN1010-6
X2-DFN1410-6
74AUP1G17.pdf 74AUP1G17
74LVC2G34 dual buffer 74LVC2G34
74LVC2G34 dual buffer 74LVC2G34