LTC6950 - 1.4GHz Low Phase Noise, Low Jitter PLL with Clock Distribution

The LTC®6950 is a low phase noise integer-N frequency synthesizer core with clock distribution. The LTC6950 delivers the low phase noise clock signals demanded in high frequency, high resolution data acquisition systems.

The frequency synthesizer contains a full low noise PLL core with a programmable reference divider (R), a programmable feedback divider (N), a phase/frequency detector (PFD) and a low noise charge pump (CP). The clock distribution section of the LTC6950 delivers up to five outputs based on the VCO input. Each output is individually programmed to divide the VCO input frequency by any integer from 1 to 63 and to delay the output by 0 to 63 VCO clock cycles. Four of the outputs feature very low noise, low skew LVPECL logic signals capable of operation up to 1.4GHz. The fifth output is selectable as either an LVDS (800MHz) or CMOS (250MHz) logic type. This output is also programmed to produce an output signal based on either the VCO input or the reference divider output.

  • Low Phase Noise and Jitter
  • Additive Jitter: 18fsRMS (12kHz to 20MHz)
  • Additive Jitter: 85fsRMS (10Hz to Nyquist)
  • EZSync™ Multichip Clock Edge Synchronization
  • Full PLL Core with Lock Indicator
  • –226dBc/Hz Normalized In-Band Phase Noise Floor
  • –274dBc/Hz Normalized 1/f Phase Noise
  • 1.4GHz Maximum VCO Input Frequency
  • Four Independent, Low Noise 1.4GHz LVPECL Outputs
  • One LVDS/CMOS Configurable Output
  • Five Independently Programmable Dividers Covering All Integers from 1 to 63
  • Five Independently Programmable VCO Clock Cycle Delays Covering All Integers from 0 to 63
  • –40°C to 105°C Junction Temperature Range
  • ClockWizard Software Design Tool Support
Typical Application
LTC6950 Typical Application
LTC6950 Typical Application
  • Clocking High Speed, High Resolution ADCs, DACs and Data Acquisition Systems
  • Low Jitter Clock Generation and Distribution
LTC6950 Package Drawing
Order Information
Part NumberPackageTempPrice(1-99)Price (1k)*
LTC6950IUHH#PBF5x9 QFN-48I$14.21$9.95
LTC6950IUHH#TRPBF5x9 QFN-48I$14.27$10.01
Demo Boards
Part NumberDescriptionPrice
DC1795ALTC6950 Demo Board| Integer-N PLL with 5 outputs (requires DC590 or DC2026)$300.00
Companion Boards
Part NumberDescriptionPrice
DC2026CLinduino One Isolated USB Demo Board: An Arduino- and QuikEval-Compatible Code Development Platform$75.00
DC590BIsolated USB Serial Controller for Linear Technology QuikEval-Compatible Demo Boards$50.00
Reliability Data
Product Selector Card
LT Journal
Press Release
Software and Simulation
CAD Symbol
Related Products
LTC6950 - 1.4GHz Low Phase Noise, Low Jitter PLL with Clock Distribution
具 PLL 的 5 输出超低抖动时钟分配器提供独特的多芯片输出同步方法
R565 - Reliability Data
Ultralow Jitter Clock Generation and Distribution
Ultralow Jitter Clock Generators and Distributors Maximize Data Converter SNR
1.4GHz Low Jitter PLL with Clock Distribution Solves Difficult Clocking Problems: Multi-Clock Synchronization and Data Converter Clocking
Five Output Ultralow Jitter Clock Distributor with PLL Provides Unique Multichip Output Synchronization Method
LTC6950 IBIS Model
LTC6950 Footprints and Symbols
1.4GHz Clean Clocking Solution
LTC6950 - DC1795A Linduino .INO File
LTC6950 - Linduino Header File
LTC6950 - Linduino.CPP File