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MAX19586：High-Dynamic-Range, 16-Bit, 80Msps ADC with -82dBFS Noise Floor

The MAX19586 is a 3.3V, high-speed, high-performance analog-to-digital converter (ADC) featuring a fully differential wideband track-and-hold (T/H) and a 16-bit converter core. The MAX19586 is optimized for multichannel, multimode receivers, which require the ADC to meet very stringent dynamic performance requirements. With a -82dBFS noise floor, the MAX19586 allows for the design of receivers with superior sensitivity requirements. At 80Msps, the MAX19586 achieves a 79.2dB signal-to-noise ratio (SNR) and an 84.3dBc/100dBc single-tone spurious-free dynamic range (SFDR) performance (SFDR1/SFDR2) at fIN = 70MHz. The MAX19586 is not only optimized for excellent dynamic performance in the 2nd Nyquist region, but also for high-IF input frequencies. For instance, at 130MHz, the MAX19586 achieves an 82.5dBc SFDR and its SNR performance stays flat (within 2.5dB) throughout the 4th Nyquist region. This level of performance makes the part ideal for high-performance digital receivers. The MAX19586 operates from a 3.3V analog supply voltage and a 1.8V digital voltage, features a 2.56VP-P full-scale input range, and allows for a guaranteed sampling speed of up to 80Msps. The input track-and-hold stage operates with a 600MHz full-scale, full-power bandwidth. The MAX19586 features parallel, low-voltage CMOS-compatible outputs in two's-complement output format. The MAX19586 is manufactured in an 8mm x 8mm, 56-pin thin QFN package with exposed paddle (EP) for low thermal resistance, and is specified for the extended industrial (-40°C to +85°C) temperature range.

Key Features 80Msps Minimum Sampling Rate -82dBFS Noise Floor Excellent Dynamic Performance 80dB/79.2dB SNR at fIN = 10MHz/70MHz and -2dBFS 96dBc/102dBc Single-Tone SFDR1/ SFDR2 at fIN = 10MHz 84.3dBc/100dBc Single-Tone SFDR1/ SFDR2 at fIN = 70MHz Less than 0.1ps Sampling Jitter 1.1W Power Dissipation 2.56VP-P Fully Differential Analog Input Voltage Range CMOS-Compatible Two's-Complement Data Output Separate Data Valid Clock and Over-Range Outputs Flexible Input Clock Buffer 3.3V Analog Power Supply; 1.8V Digital Output Supply Small 8mm x 8mm x 0.8mm 56-Pin Thin QFN Package EV Kit Available for MAX19586 (Order MAX19586EVKIT)

MAX19586: Block Diagram Applications/Uses Antenna Array Processing Cellular Base-Station Transceiver Systems (BTS) E911 Location Receivers High-Performance Instrumentation Multicarrier Receivers Multistandard Receivers Wireless Local Loop (WLL)

DataSheet

Parametrics

Design kits & evaluation modules

• MAX19586EVKIT
• MAX19588EVKIT

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