74AHC1G07GV: Buffer with open-drain output

74AHC1G07 and 74AHCT1G07 are high-speed Si-gate CMOS devices. They provide a non-inverting buffer.

The output of these devices is open-drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions. For digital operation this device must have a pull-up resistor to establish a logic HIGH-level.

The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V.

The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.

74AHC1G07GV: Product Block Diagram
74AHC1G07GV: Block Diagram
Outline 3d SOT753
Data Sheets (1)
Name/DescriptionModified Date
Buffer with open-drain output (REV 7.0) PDF (135.0 kB) 74AHC_AHCT1G07 [English]22 Jun 2016
Application Notes (6)
Name/DescriptionModified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]13 Mar 2013
Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English]13 Mar 2013
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English]13 Mar 2013
Pin FMEA for AHC/AHCT family (REV 1.0) PDF (52.0 kB) AN11106 [English]04 Nov 2011
PicoGate Logic footprints (REV 1.0) PDF (87.0 kB) AN10161 [English]30 Oct 2002
Brochures (2)
Name/DescriptionModified Date
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English]16 Feb 2015
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English]20 May 2014
Package Information (1)
Name/DescriptionModified Date
plastic surface-mounted package; 5 leads (REV 1.0) PDF (243.0 kB) SOT753 [English]08 Feb 2016
Packing (1)
Name/DescriptionModified Date
Tape reel SMD; reversed product orientation 12NC ending 125 (REV 1.0) PDF (186.0 kB) SOT753_125 [English]29 Nov 2012
Supporting Information (1)
Name/DescriptionModified Date
MAR_SOT753 Topmark (REV 1.0) PDF (89.0 kB) MAR_SOT753 [English]03 Jun 2013
IBIS Model
Ordering Information
ProductStatusFamilyFunctionVCC (V)Logic switching levelsDescriptionOutput drive capability (mA)Package versionfmax (MHz)No of bitsPower dissipation considerationstpd (ns)Tamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package nameNo of pins
74AHC1G07GVActiveAHC(T)Buffers/inverters/drivers2.0 - 5.5CMOSopen-drain8SOT753601low2.5-40~12527466.1172TSOP55
Buffer with open-drain output 74AHC1G07GW
Sorting through the low voltage logic maze 74LVC_H_245A_Q100
Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
Ground and VCC Bounce of High-Speed Integrated Circuits 74ALVC164245DGG-Q100
Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100
Pin FMEA for AHC/AHCT family 74AHC_T_245_Q100
PicoGate Logic footprints NX3L4684
電圧レベルシフタ 74AVC16245DGG-Q100
Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
MAR_SOT753 Topmark 74LVC1G17_Q100
ahc1g07 IBIS model 74AHC1G07GW
plastic surface-mounted package; 5 leads 74LVC1G17_Q100
Tape reel SMD; reversed product orientation 12NC ending 125 74LVC1G17_Q100
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74HC_T_3G07
BAP70Q