74ALVC32PW: Quad 2-input OR gate

The 74ALVC32 is a quad 2-input OR gate.

Schmitt trigger action on all inputs makes the device tolerant of slow rise and fall times.

74ALVC32PW: Product Block Diagram
Outline 3d SOT402-1
Data Sheets (1)
Name/DescriptionModified Date
Quad 2-input OR gate (REV 3.0) PDF (142.0 kB) 74ALVC32 [English]20 Jan 2014
Application Notes (5)
Name/DescriptionModified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]13 Mar 2013
Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English]13 Mar 2013
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English]13 Mar 2013
Interfacing 3 Volt and 5 Volt Applications (REV 1.0) PDF (63.0 kB) AN240 [English]15 Sep 1995
Brochures (2)
Name/DescriptionModified Date
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English]16 Feb 2015
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English]20 May 2014
Selector Guides (2)
Name/DescriptionModified Date
ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English]19 Nov 2015
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English]08 Jan 2015
Package Information (1)
Name/DescriptionModified Date
plastic thin shrink small outline package; 14 leads; body width 4.4 mm (REV 1.0) PDF (285.0 kB) SOT402-1 [English]08 Feb 2016
Packing (1)
Name/DescriptionModified Date
TSSOP14; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... (REV 1.0) PDF (217.0 kB) SOT402-1_118 [English]08 Apr 2013
Supporting Information (1)
Name/DescriptionModified Date
Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English]08 Oct 2009
IBIS Model
Ordering Information
ProductStatusFamilyVCC (V)FunctionLogic switching levelsTypeDescriptionOutput drive capability (mA)Package versiontpd (ns)fmax (MHz)No of bitsPower dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package nameNo of pins
74ALVC32PWActiveALVC1.65 - 3.6OR gatesTTLOR gatesquad 2-input OR gate+/- 24SOT402-121504low-40~851386.964TSSOP1414
Package Information
Product IDPackage DescriptionOutline VersionReflow/Wave SolderingPackingProduct StatusPart NumberOrdering code(12NC)MarkingChemical ContentRoHS / Pb Free / RHFLeadFree Conversion DateEFRIFR(FIT)MTBF(hour)MSLMSL LF
74ALVC32PWSOT402-1SSOP-TSSOP-VSO-WAVEReel 13" Q1/T1Active74ALVC32PW,118 (9352 697 29118)ALVC3274ALVC32PWweek 10, 2005123.83.872.58E811
Bulk PackActive74ALVC32PW,112 (9352 697 29112)ALVC3274ALVC32PWweek 10, 2005123.83.872.58E811
Quad 2-input OR gate 74ALVC32PW
Sorting through the low voltage logic maze 74LVC_H_245A_Q100
Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
Ground and VCC Bounce of High-Speed Integrated Circuits 74ALVC164245DGG-Q100
Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100
Interfacing 3 Volt and 5 Volt Applications 74LVC377PW
電圧レベルシフタ 74AVC16245DGG-Q100
Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
ロジック製品セレクションガイド... 74LVC_H_245A_Q100
Logic selection guide 2016 74LVC_H_245A_Q100
alvc32 IBIS model 74ALVC32PW
plastic thin shrink small outline package; 14 leads; body width 4.4 mm 74LV164_Q100
SSOP-TSSOP-VSO-WAVE LPC1114FDH28
TSSOP14; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... 74LV164_Q100
74LVC32A
74LV164