74AUP1G74DC-Q100: Low-power D-type flip-flop with set and reset; positive-edge trigger
The 74AUP1G74-Q100 provides a low-power, low-voltage single positive-edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs and complementary Q and Q outputs. The SD and RD are asynchronous active LOW inputs and operate independently of the clock input. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse. The D input must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
Outline 3d SOT765-1
Data Sheets (1)
| Name/Description | Modified Date |
|---|---|
| Low-power D-type flip-flop with set and reset; positive-edge trigger (REV 1.0) PDF (173.0 kB) 74AUP1G74_Q100 | 27 May 2015 |
Package Information (1)
| Name/Description | Modified Date |
|---|---|
| plastic very thin shrink small outline package; 8 leads; body width 2.3 mm (REV 1.1) PDF (245.0 kB) SOT765-1 | 05 Jul 2016 |
Packing (1)
| Name/Description | Modified Date |
|---|---|
| VSSOP8; Reel pack, reverse; SMD, 7" Q3/T4 Standard product orientation Orderable part number ending ,125 or... (REV 5.0) PDF (210.0 kB) SOT765-1_125 | 03 May 2013 |
Ordering Information
| Product | Status | Family | VCC (V) | Logic switching levels | Description | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins | Package version |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74AUP1G74DC-Q100 | Active | AUP | 1.1 - 3.6 | CMOS | single D-type flip-flop with set and reset | +/- 1.9 | 8.1 | 400 | ultra low | -40~125 | 203 | 34.1 | 113 | VSSOP8 | 8 | SOT765-1 |
Package Information
| Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | MSL | MSL LF |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74AUP1G74DC-Q100 | | SOT765-1 | Reel 7" Q3/T4, Reverse | Active | 74AUP1G74DC-Q100H (9353 066 05125) | Standard Marking | 74AUP1G74DC-Q100 |    | Always Pb-free | 1 | 1 |
