74AUP3G34GS: Low-power triple buffer

The 74AUP3G34 is a triple buffer.

Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.

74AUP3G34GS: Product Block Diagram
sot1203_3d
Data Sheets (1)
Name/DescriptionModified Date
Low-power triple buffer (REV 2.0) PDF (215.0 kB) 74AUP3G34 [English]12 Oct 2016
Brochures (1)
Name/DescriptionModified Date
NXP® ultra-low-power CMOS logic 74AUP1G/2G/3Gxxx: Advanced, ultra-low-power CMOS logic (REV 1.0) PDF (1.4 MB) 75017458 [English]13 Oct 2014
Selector Guides (2)
Name/DescriptionModified Date
ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English]19 Nov 2015
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English]08 Jan 2015
Package Information (1)
Name/DescriptionModified Date
extremely thin small outline package; no leads; 8 terminals (REV 1.0) PDF (188.0 kB) SOT1203 [English]08 Feb 2016
Packing (1)
Name/DescriptionModified Date
Standard product orientation 12NC ending 115 (REV 1.0) PDF (88.0 kB) SOT1203_115 [English]03 Jul 2013
Supporting Information (1)
Name/DescriptionModified Date
MAR_SOT1203 Topmark (REV 1.0) PDF (73.0 kB) MAR_SOT1203 [English]03 Jun 2013
IBIS Model
Ordering Information
ProductStatusFamilyVCC (V)FunctionLogic switching levelsDescriptionOutput drive capability (mA)Package versionfmax (MHz)No of bitsPower dissipation considerationstpd (ns)Tamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package nameNo of pins
74AUP3G34GSActiveAUP1.1 - 3.6triple bufferCMOStriple buffer+/- 1.9SOT1203703ultra low3.9-40~12527610.8146XSON88
Package Information
Product IDPackage DescriptionOutline VersionReflow/Wave SolderingPackingProduct StatusPart NumberOrdering code(12NC)MarkingChemical ContentRoHS / Pb Free / RHFLeadFree Conversion DateMSLMSL LF
74AUP3G34GSSOT1203Reel 7" Q1/T1Active74AUP3G34GSX (9353 051 61115)Standard Marking74AUP3G34GSAlways Pb-free11
Low-power triple buffer 74AUP3G34GT
NXP® ultra-low-power CMOS logic 74AUP1G/2G/3Gxxx: Advanced, ultra-low-power CMOS logic 74AUP1G86GW-Q100
ロジック製品セレクションガイド... 74LVC_H_245A_Q100
Logic selection guide 2016 74LVC_H_245A_Q100
MAR_SOT1203 Topmark 74AXP2T3407GS
74AUP3G34 IBIS Model 74AUP3G34GT
SOT1203 74AXP2T3407GS
Reel 7" Q1/T1 74AXP2T3407GS
74AVCM162836DGG
74LVC3G17