74LVT162373DGG: 3.3 V LVT 16-bit transparent D-type latch with 30 Ohm termination resistors (3-State)

The 74LVT162373 is a high-performance BiCMOS product designed for VCC operation at 3.3 V.

This device is a 16-bit transparent D-type latch with non-inverting 3-State bus compatible outputs. The device can be used as two 8-bit latches or one 16-bit latch. When Latch Enable (LE) input is High, the Q outputs follow the data (D) inputs. When Latch Enable is taken Low, the Q outputs are latched at the levels of the D inputs one setup time prior to the High-to-Low transition.

The 74LVT162373 is designed with 30 Ω series resistance in both the High and Low states of the output. This design reduces the noise in applications such as memory address drivers, clock drivers, and bus receivers/transmitters.

74LVT162373DGG: Product Block Diagram

Outline 3d SOT362-1

Data Sheets (1)

Name/Description	Modified Date
3.3 V LVT 16-bit transparent D-type latch with 30 Ohm termination resistors (3-state) (REV 1.0) PDF (121.0 kB) 74LVT162373 [English]	13 Mar 2014

Application Notes (8)

Name/Description	Modified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]	13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]	13 Mar 2013
A metastability primer (REV 1.0) PDF (40.0 kB) AN219 [English]	13 Mar 2013
Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English]	13 Mar 2013
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English]	13 Mar 2013
Test Fixtures for High Speed Logic (REV 1.0) PDF (341.0 kB) AN203 [English]	02 Apr 1998
Transmission Lines and Terminations with Philips Advanced Logic Families (REV 1.0) PDF (217.0 kB) AN246 [English]	01 Feb 1998
LVT (Low Voltage Technology) and ALVT (Advanced LVT) (REV 1.0) PDF (133.0 kB) AN243 [English]	01 Jan 1998

Selector Guides (2)

Name/Description	Modified Date
ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English]	19 Nov 2015
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English]	08 Jan 2015

Package Information (1)

Name/Description	Modified Date
plastic thin shrink small outline package; 48 leads; body width 6.1 mm (REV 1.0) PDF (467.0 kB) SOT362-1 [English]	08 Feb 2016

Packing (1)

Name/Description	Modified Date
TSSOP48; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... (REV 5.0) PDF (242.0 kB) SOT362-1_118 [English]	15 Apr 2013

Supporting Information (1)

Name/Description	Modified Date
Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English]	08 Oct 2009

IBIS Model

lvt162373 IBIS model (REV 1.0) ibs LVT162373 4/7/2013

Ordering Information

Product	Status	Family	V_CC (V)	Function	Logic switching levels	Description	Output drive capability (mA)	Package version	t_pd (ns)	No of bits	Power dissipation considerations	T_amb (Cel)	R_th(j-a) (K/W)	Ψ_th(j-top) (K/W)	R_th(j-c) (K/W)	Package name	No of pins
74LVT162373DGG	Active	LVT	2.7 - 3.6	Latches/registered drivers	TTL	16-bit D-type transparent latch with bus hold and 30 ohm termination resistors (3-state)	+/- 12	SOT362-1	2.5	16	medium	-40~85	82	1.8	35	TSSOP48	48

Package Information

Product ID	Outline Version	Reflow/Wave Soldering	Packing	Product Status	Part NumberOrdering code(12NC)	Marking	Chemical Content	LeadFree Conversion Date	EFR	IFR(FIT)	MTBF(hour)	MSL	MSL LF
74LVT162373DGG	SOT362-1	SSOP-TSSOP-VSO-WAVE	Bulk Pack	Active	74LVT162373DGG,112 (9352 641 64112)	LVT162373	74LVT162373DGG	Always Pb-free	70.8	1.33	7.52E8	1	1
			Reel 13" Q1/T1	Active	74LVT162373DGG,118 (9352 641 64118)	LVT162373	74LVT162373DGG	Always Pb-free	70.8	1.33	7.52E8	1	1
			Reel 13" Q1/T1 in Drypack	Withdrawn	74LVT162373DGG,518 (9352 641 64518)	LVT162373	74LVT162373DGG	week 14, 2005	70.8	1.33	7.52E8	2	2