GTL2008PW: 12-bit GTL to LVTTL translator with power good control and high-impedance LVTTL and GTL outputs
The GTL2008 is a customized translator between dual Xeon processors, Platform Health Management, South Bridge and Power Supply LVTTL and GTL signals.
Functionally and footprint identical to the GTL2007, the GTL2008 LVTTL and GTL outputs were changed to put them into a high-impedance state when EN1 and EN2 are LOW, with the exception of 11BO because its normal state is LOW, so it is forced LOW. EN1 and EN2 will remain LOW until VCC is at normal voltage, the other inputs are in valid states and VREF is at its proper voltage to assure that the outputs will remain high-impedance through power-up.
The GTL2008 has the enable function that disables the error output to the monitoring agent for platforms that monitor the individual error conditions from each processor. This enable function can be used so that false error conditions are not passed to the monitoring agent when the system is unexpectedly powered down. This unexpected power-down could be from a power supply overload, a CPU thermal trip, or some other event of which the monitoring agent is unaware.
A typical implementation would be to connect each enable line to the system power good signal or the individual enables to the VRD power good for each processor.
Typically Xeon processors specify a VTT of 1.1 V to 1.2 V, as well as a nominal Vref of 0.73 V to 0.76 V. To allow for future voltage level changes that may extend Vref to 0.63 of VTT(minimum of 0.693 V with VTT of 1.1 V) the GTL2008 allows a minimum Vref of 0.66 V. Characterization results show that there is little DC or AC performance variation between these Vref levels.
GTL2008PW: Product Block Diagram
Outline 3d SOT361-1
Data Sheets (1)
Application Notes (1)
| Name/Description | Modified Date |
|---|
| I2C manual (REV 1.0) PDF (4.2 MB) AN10216 | 27 Mar 2003 |
Brochures (2)
Package Information (1)
Packing (1)
Reports or Presentations (1)
Supporting Information (1)
IBIS Model
Ordering Information
| Product | Status | Package version | Application | Function | Operating Temperature (Cel) | Voltage Translation Range (V) | TTL Drive (mA) | GTL Drive (mA) | Number of bits |
|---|
| GTL2008PW | Active | SOT361-1 | Dual Xeon Processor Interface to 3.3V Chipset with power good enable | 12-bit GTL-/GTL/GTL+ to LVTTL translator | -40~85 | 0.5 to 3.6 ~ 3.0 to 5.5 | 16 | 15 | 12 |
Package Information
| Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
|---|
| GTL2008PW | | SOT361-1 | SSOP-TSSOP-VSO-WAVE | Reel 13" Q1/T1 | Active | GTL2008PW,118
(9352 821 67118) | GTL2008 | GTL2008PW |    | Always Pb-free | 0.0 | 2.0 | 5E8 | 1 | 1 |
| Bulk Pack | Active | GTL2008PW,112
(9352 821 67112) | GTL2008 | GTL2008PW | | Always Pb-free | 0.0 | 2.0 | 5E8 | 1 | 1 |
