GTL2014PW: 4-bit LVTTL to GTL transceiver

The GTL2014 is a 4-bit translating transceiver designed for 3.3 V LVTTL system interface with a GTL-/GTL/GTL+ bus, where GTL-/GTL/GTL+ refers to the reference voltage of the GTL bus and the input/output voltage thresholds associated with it.

The direction pin allows the part to function as either a GTL to LVTTL sampling receiver or as a LVTTL to GTL interface.

The GTL2014 LVTTL inputs (only) are tolerant up to 5.5 V allowing direct access to TTL or 5 V CMOS inputs. The LVTTL outputs are not 5.5 V tolerant.

The GTL2014 GTL inputs and outputs operate up to 3.6 V, allowing the device to be used in higher voltage open-drain output applications.

GTL2014 is pin-to-pin backward compatible to the GTL2005 (labels for A port and B port are interchanged). GTL2014’s Vref tracks down to 0.5 V for low voltage CPU, propagation delays are slightly longer, while GTL2005’s Vref linearity degrades below 0.8 V and has shorter propagation delay.

GTL2014PW: Product Block Diagram
Outline 3d SOT402-1
Data Sheets (1)
Name/DescriptionModified Date
4-bit LVTTL to GTL transceiver (REV 3.0) PDF (163.0 kB) GTL201414 Jun 2012
Application Notes (1)
Name/DescriptionModified Date
I2C manual (REV 1.0) PDF (4.2 MB) AN1021627 Mar 2003
Brochures (2)
Name/DescriptionModified Date
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP16 Feb 2015
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 7501751120 May 2014
Package Information (1)
Name/DescriptionModified Date
plastic thin shrink small outline package; 14 leads; body width 4.4 mm (REV 1.0) PDF (285.0 kB) SOT402-108 Feb 2016
Packing (1)
Name/DescriptionModified Date
TSSOP14; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... (REV 1.0) PDF (217.0 kB) SOT402-1_11808 Apr 2013
Reports or Presentations (1)
Name/DescriptionModified Date
design_con_2003_tecforum_i2c_b_1 (REV 0.1) PDF (4.2 MB) DESIGN_CON_2003_TECFORUM_I2C_B_127 Jan 2003
Supporting Information (1)
Name/DescriptionModified Date
Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE08 Oct 2009
IBIS Model
Ordering Information
ProductStatusPackage versionApplicationFunctionOperating Temperature (Cel)Voltage Translation Range (V)TTL Drive (mA)GTL Drive (mA)Number of bits
GTL2014PWActiveSOT402-1Processor InterfaceBi-Directional Non-Latched-40~851.14 to 1.65 ~ 3.0 to 5.516404
GTL2014PW/GNo Longer ManufacturedSOT402-1Processor InterfaceBi-Directional Non-Latched-40~851.14 to 1.65 ~ 3.0 to 5.516404
Package Information
Product IDPackage DescriptionOutline VersionReflow/Wave SolderingPackingProduct StatusPart NumberOrdering code(12NC)MarkingChemical ContentRoHS / Pb Free / RHFLeadFree Conversion DateEFRIFR(FIT)MTBF(hour)MSLMSL LF
GTL2014PWSOT402-1SSOP-TSSOP-VSO-WAVEReel 13" Q1/T1ActiveGTL2014PW,118 (9352 774 99118)GTL2014GTL2014PWAlways Pb-free0.02.05E811
Bulk PackActiveGTL2014PW,112 (9352 774 99112)GTL2014GTL2014PWAlways Pb-free0.02.05E811
4-bit LVTTL to GTL transceiver GTL2014PW
I2C manual se98apw
電圧レベルシフタ 74AVC16245DGG-Q100
Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
design_con_2003_tecforum_i2c_b_1 lm75a
GLT2014 IBIS model GTL2014PW
plastic thin shrink small outline package; 14 leads; body width 4.4 mm 74LV164_Q100
SSOP-TSSOP-VSO-WAVE LPC1114FDH28
TSSOP14; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... 74LV164_Q100
GTL2014PW
74LV164