HEF4014B: 8-bit static shift register (Based on PIP HEF4014B)
The HEF4014B is a fully synchronous edge-triggered 8-bit static shift register with eight synchronous parallel inputs (D0 to D7), a synchronous serial data input (DS), a synchronous parallel enable input (PE), a LOW-to-HIGH edge-triggered clock input (CP) and buffered parallel outputs from the last three stages (Q5 to Q7).
Operation is synchronous and the device is edge-triggered on the LOW-to-HIGH transition of CP. Each register stage is of a D-type master-slave flip-flop type. When PE is HIGH, data is loaded into the register from D0 to D7 on the LOW-to-HIGH transition of CP. When PE is LOW, data is shifted to the first position from DS, and all the data in the register is shifted one position to the right on the LOW-to-HIGH transition of CP. The clock input’s Schmitt trigger action makes it highly tolerant of slower clock rise and fall times.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS(usually ground). Unused inputs must be connected to VDD, VSS, or another input.
HEF4014B: Product Block Diagram
sot109-1_3d
Data Sheets (1)
Application Notes (1)
Brochures (2)
Package Information (1)
Supporting Information (2)
Ordering Information
| Product | Status |
|---|
| HEF4014BT | Active |
Package Information
| Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
|---|
| HEF4014BT | | SOT109-1 | SO-SOJ-REFLOW
SO-SOJ-WAVE
SO-SOJ-REFLOW
SO-SOJ-WAVE | Reel 13" Q1/T1 CECC | Active | HEF4014BT,653
(9333 726 70653) | HEF4014BT | HEF4014BT |    | week 6, 2004 | 75.3 | 2.99 | 3.34E8 | 1 | 1 |
| Bulk Pack, CECC | Active | HEF4014BT,652
(9333 726 70652) | HEF4014BT | HEF4014BT | | week 6, 2004 | 75.3 | 2.99 | 3.34E8 | 1 | 1 |
