HEF40175BTT: Quad D-type flip-flop
The HEF40175B is a quad edge-triggered D-type flip-flop with four data inputs (D0 to D3), a clock input (CP), an overriding asynchronous master reset input (MR), four buffered outputs (Q0 to Q3), and four complementary buffered outputs (Q0 to Q3). Information on D0 to D3 is transferred to Q0 to Q3 on the LOW-to-HIGH transition of CP if MR is HIGH. When LOW, MR resets all flip-flops (Q0 to Q3 = LOW; Q0 to Q3 = HIGH), independent of CP and D0 to D3.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input.
Outline 3d SOT403-1
Data Sheets (1)
| Name/Description | Modified Date |
|---|---|
| Quad D-type flip-flop (REV 9.0) PDF (158.0 kB) HEF40175B [English] | 21 Mar 2016 |
Application Notes (1)
| Name/Description | Modified Date |
|---|---|
| Pin FMEA HEF4000 family (REV 2.0) PDF (30.0 kB) AN11051 [English] | 21 Aug 2015 |
Brochures (2)
| Name/Description | Modified Date |
|---|---|
| 電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English] | 16 Feb 2015 |
| Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English] | 20 May 2014 |
Package Information (1)
| Name/Description | Modified Date |
|---|---|
| plastic thin shrink small outline package; 16 leads; body width 4.4 mm (REV 1.0) PDF (300.0 kB) SOT403-1 [English] | 08 Feb 2016 |
Packing (1)
| Name/Description | Modified Date |
|---|---|
| TSSOP16; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... (REV 1.0) PDF (218.0 kB) SOT403-1_118 [English] | 08 Apr 2013 |
Supporting Information (1)
| Name/Description | Modified Date |
|---|---|
| Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English] | 08 Oct 2009 |
Ordering Information
| Product | Status | Family | Function | VCC (V) | Description | Logic switching levels | Output drive capability (mA) | Package version | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| HEF40175BTT | Active | HEF4000B | D-type flip-flops | 4.5 - 15.5 | positive-edge trigger | CMOS | +/- 2.4 | SOT403-1 | 25 | 45 | low | -40~85 | 115 | 2.2 | 43.2 | TSSOP16 | 16 |
Package Information
| Product ID | Package Description | Outline Version | Reflow/Wave Soldering | Packing | Product Status | Part NumberOrdering code(12NC) | Marking | Chemical Content | RoHS / Pb Free / RHF | LeadFree Conversion Date | EFR | IFR(FIT) | MTBF(hour) | MSL | MSL LF |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| HEF40175BTT | | SOT403-1 | SSOP-TSSOP-VSO-WAVE | Reel 13" Q1/T1 | Active | HEF40175BTT,118 (9352 944 21118) | HF40175 | HEF40175BTT |    | Always Pb-free | 75.3 | 2.99 | 3.34E8 | 1 | 1 |
- Quad D-type flip-flop HEF40175BTT
- Pin FMEA HEF4000 family HEF4894B_Q100
- 電圧レベルシフタ 74AVC16245DGG-Q100
- Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
- SOT403-1 LPC812M101JDH16
- SSOP-TSSOP-VSO-WAVE LPC1114FDH28
- Reel 13" Q1/T1 LPC812M101JDH16
- PCA9633
