NLSF1174: Hex D Flip-Flop with Common Clock and Reset

This device consists of six flip-flops with common Clock and Reset inputs. Each flip-flop is loaded with a low-tohigh transition; of the Clock input. Reset is asynchronous and active low. All inputs/outputs are standard CMOS compatible.

Features
  • Output Drive Compatibility: 10 LSTTL Loads
  • Outpus Directly Interface to CMOS
  • Operation Voltage Range: 2 to 6 V
  • Low Input Current: 1.0 µ A
  • MSL Level 1
  • Chip Complexity: 162 FET
  • Pb-Free Package is Available
Packages
Data Sheets (1)
Document TitleDocument ID/SizeRevisionRevision Date
Hex D Flip-Flop with Common Clock And ResetNLSF1174/D (81.0kB)5
Package Drawings (1)
Document TitleDocument ID/SizeRevision
QFN16, 3x3, 0.5P485G-01 (57.3kB)F
Order Information
ProductStatusCompliancePackageMSL*ContainerBudgetary Price/Unit
NLSF1174MNR2GActivePb-free Halide freeQFN-16485G-011Tape and Reel3000$0.624
Specifications
ProductTypeChannelsVCC Min (V)VCC Max (V)tpd Max (ns)IO Max (mA)
NLSF1174MNR2GD-Type6261925
Hex D Flip-Flop with Common Clock And Reset (81.0kB) NLSF1174
QFN16, 3x3, 0.5P NLSF308