SPI BUS EEPROM - BR25G512FVT-3

BR25G512-3 is a 512Kbit serial EEPROM of SPI BUS interface.

Part NumberStatusPackageUnit QuantityMinimum Package QuantityPacking TypeRoHS
BR25G512FVT-3GE2ActiveTSSOP-B830003000TapingYes

BR25G512FVT-3 Data Sheet

Specifications
GradeStandard
I/FSPI BUS
Density [bit]512K
Bit Format [Word x Bit]64K x 8
PackageTSSOP-B8
Operating Temperature (Min.)[°C]-40
Operating Temperature (Max.)[°C]85
Vcc(Min.)[V]1.8
Vcc(Max.)[V]5.5
Circuit Current (Max.)[mA]4.0
Standby Current (Max.)[μA]1.0
Write Cycle (Max.)[ms]5.0
Input Frequency (Max.)[Hz]10M
Endurance (Max.)[Cycle]106
Data Retention (Max.)[Year]100
Technical Documents
Features
  • High Speed Clock Action up to 10MHz (Max)
  • Wait Function by HOLDB Terminal
  • Part or Whole of Memory Arrays Settable as Read only Memory Area by Program
  • 1.8V to 5.5V Single Power Source Operation Most Suitable for Battery Use
  • Up to 128 Bytes in Page Write Mode.
  • For SPI BUS interface (CPOL, CPHA) = (0, 0), (1, 1)
  • Self-timed Programming Cycle
  • Low Current Consumption
    ·At Write Action (5V) : 0.7mA (Typ)
    ·At Read Action (5V) : 2.4mA (Typ)
    ·At Standby Action (5V) : 0.1µA (Typ)
  • Address Auto Increment Function at Read Action
  • Prevention of Write Mistake
    ·Write Prohibition at Power On
    ·Write Prohibition by Command Code (WRDI)
    ·Write Prohibition by WPB Pin
    ·Write Prohibition Block Setting by Status Registers (BP1, BP0)
    ·Prevention of Write Mistake at Low Voltage
  • More than 100 years Data Retention
  • More than 1 Million Write Cycles
  • Bit Format 64K×8
  • Initial Delivery Data
    Memory Array: FFh
    Status Register: WPEN, BP1, BP0 : 0
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Application Note BA12004BF
Part Explanation BA12004BF